Press-pack IGBT power devices are the core component in the new power system application equipment, and health management can improve their service lifetime and operational reliability, thus guaranteeing the safety and stability of new power systems. First, the package structure and main failure modes of press-pack IGBT devices are introduced. Second, the existing health condition monitoring methods are classified and analyzed according to different types of characteristic parameters. Third, the principles and characteristics of the existing lifetime prediction methods for press-pack IGBTs are summarized. Finally, a comprehensive comparative analysis of the existing health management technologies is performed, and the problems in the health management methods for press-pack IGBTs which need to be further studied and the development trends in the future are pointed out.

Press-pack insulated gate bipolar transistor (PP-IGBT) modules are widely used in high-power applications such as flexible DC converter valves owing to their superior electrical performance and reliability. Therefore, an accurate observation of the junction temperature of a IGBT chip is important for monitoring its operating status and evaluating its remaining lifetime. The existing junction temperature observation methods are mostly designed for bonded-lead IGBTs, which cannot be applied directly because the characteristics of PP modules are not taken into account. Aimed at the PP IGBTs in large-capacity converter valves, a practical method for calibrating the on-state voltage drop and junction temperature of modules is proposed, and the online estimation error of junction temperature is comprehensively analyzed. Then, a junction temperature calibration scheme is designed based on a 5SNA 3000K452300 PP IGBT module(4 500 V, 3 000 A) produced by ABB, including experimental circuits, temperature calibration range selection, junction temperature control method, measurement circuits and calibration experimental procedure. Finally, based on a pulse test platform, the proposed method was verified. Experimental results show that the junction temperature calibration and observation scheme proposed was effective, the junction temperature observation error was within ±5 °C, and it can be applied to the case of differences in PP IGBT modules.

LLC resonant converters are widely applied in on-board power supplies owing to their high power density, high efficiency and small size, and their reliability is critical to the driving safety and passenger experiences. However, the complicated working conditions and harsh environment under which vehicles operate have become a huge challenge to power devices. When a switch failure occurs, the resonant converter cannot maintain a stable output voltage while operating at a resonant point, and both efficiency and output capability of the system will decrease substantially. To make the converter more compatible with fault occasions, an improved LLC topology and its control strategy are proposed in this paper, which can ensure that the output voltage remains unaffected when a switch failure occurs and the converter operates near the resonant frequency. Additionally, an optimized Burst control strategy is designed to suppress the overvoltage of the resonant capacitor during the fault tolerance transition and guarantee a smooth fault tolerance process. Finally, simulation and experimental results verified the effectiveness of the proposed method.

Owing to its advantages including lower switching stress, harmonic components and a better anti-interference capability, the diode neutral point clamped (NPC) three-level inverter has become a prominent topology for DC-AC converters used in new energy fields such as photovoltaic and energy storage. The NPC three-level insulated gate bipolar transistor(IGBT) power semiconductor module which is widely used in high-power applications is studied. The commutation circuit in the NPC three-level power module is analyzed, and a precise simulation and evaluation method for the corresponding parasitic parameters is given. According to the principle of minimizing the parasitic parameters of the commutation circuit, a dynamic characteristic test circuit suitable for the NPC three-level power semiconductor module is designed. Based on the commutation circuit and the operating principle of circuit, a drive circuit for the NPC three-level power module is designed, and a driving scheme that enhances drive current, prevents shoot-through and allows for adjustable dead time is formulated. Finally, through dynamic testing of the NPC three-level IGBT module, a comprehensive assessment of the dynamic loss in power devices under various operating conditions is conducted.

Silicon carbide (SiC) devices possess advantages such as high voltage resistance, low losses and high thermal conductivity, making them of significant importance for the development of the electric vehicle industry. A design for a SiC MOSFET power module utilizing large-chip packaging was proposed, and experiments were conducted to analyze the module's electrical performance. Simulations were set up to compare the module temperature under two conditions, i.e., electrical characteristics only and a combination of electrical characteristics and temperature feedback. Simulation results indicate that under identical operating conditions, the SiC MOSFET power module designed with large-chip packaging exhibited stronger conduction current capability, smaller temperature variations and improved electrical performance.

With the widespread applications of insulated gate bipolar transistors (IGBTs) in power electronic systems, the accurate acquisition of junction temperature which affects their reliability has become crucial. However, one of the main forms of module failure is the aging of the solder layer, which can have a significant impact on the junction temperature. To accurately estimate the junction temperature, the advantages of two traditional thermal network models (i.e., Cauer and Foster) are combined in this paper, and an interface method for the two models is studied, so that the combination is completed. The aging of the chip solder layer is taken into account, and a hybrid thermal network model is proposed. Finally, through the comparison of finite element simulation and experimental test with the calculation results of the hybrid thermal network model, it is verified that the hybrid thermal network model can achieve an accurate junction temperature estimation, providing a basis for monitoring the operating status of the module.

As electronic devices continue to miniaturize and integrate, thermal simulation has become a critical factor during the design phase. The conventional finite element method(FEM) used for the thermal simulation of electronics packaging modules faces a trade-off between computational efficiency and accuracy, and it also encounters difficulties in handling problems of large deformation and grid distortion, which will cause errors in the results. In this paper, a thermal simulation system for electronics packaging modules based on the smoothed particle hydrodynamics (SPH) algorithm is proposed. The SPH algorithm is based on the meshless Lagrange numerical method, and it resolves the heat conduction equation by discretizing the simulation object into a set of particles, thus accurately predicting the heat conduction and heat dissipation in electronics packaging modules. Since it does not need to generate a large number of micro-meshes, there is no grid distortion. Compared with FEM, the SPH algorithm achieves an accuracy error between 1% and 2%, thereby improving the simulation efficiency by approximately 30 times. Therefore, this algorithm is highly suitable in simulating the thermal behavior of a dynamical system with a complex structure.

The power control mechanism of cascaded island microgrids (MGs) composed of dispatchable and non-dis-patchable distributed generations (DGs) is complex, and the voltage and frequency regulation is difficult. Aimed at these problems, a novel decentralized master-slave power distribution control method is proposed in this paper to realize the voltage and frequency regulation and power distribution of the cascaded island MGs including second-class DGs. The control methods for master and slave DGs are designed, respectively. The master DG is responsible for adjusting the fre-quency and voltage of MG. Meanwhile, the slave DGs in MPPT mode can run under certain bus voltage, which can max-imally use the output power from non-dispatchable DGs and perform automatic power reduction under the light load condition, thereby effectively guaranteeing the safety and stability of the system. Finally, the effectiveness of the pro-posed method is verified by simulation and experimental results.

Aimed at the problem that the control modes of interconnecting power converters (IPCs) are complicated to assign and difficult to control when different types of power grids are connected, a novel grid-forming(GFM) control method for IPCs that interconnect high voltage direct current (HVDC) and high voltage alternating current (HVAC) sub-grids is proposed. This method uses modular multilevel converters (MMCs) to control AC and DC terminals simultaneously. In addition, two dual-port GFM MMC control strategies are put forward. Finally, a simulation comparison between single-port GFM control and the proposed two-port GFM control is performed. Results show that compared with the single-port GFM control, the two-port GFM control method is more flexible to emergencies(i.e., line and generator outage), and there is no need to choose the control mode of GFM or grid-following(GFL) for IPC ports in the power grid.

The thermal resistance model of a thyristor converter valve considering its water-cooling circuit is estab-lished by combining the mechanism of a thyristor connected in series with the water-cooling circuit, which can calculate the water temperature at the inlet of each heat sink, as well as the junction temperature of each thyristor accordingly. This model is used to calculate the thermal resistance of each component in the converter valve in an example, and a steady-state thermal resistance model is built to calculate the junction temperature of the thyristor. Calculation results show that the maximum calculation error of thyristor junction temperature can reach 10.81% when considering the differ-ence of coolant temperature in the water-cooling circuit.