Low Temperature Co-fired Ceramics（LTCC）technology is recognized as one of the most promising three-dimensional packaging technologies. As the pastes used in LTCC technology evolve from gold to silver and copper，electroless Ni/Pd/Au（ENEPIG）plating has become a crucial step to prevent post-sintering oxidation or electromigration failures of embedded circuits. Based on this context，this study comprehensively reviews the corrosion mechanisms of LTCC substrates in acidic/alkaline environments. Typical corrosion behaviors and failure cases are analyzed to reveal their common degradation patterns. The intrinsic relationships among the composition，structure，and corrosion resistance of LTCC sintering additive glasses under diverse corrosive conditions are systematically summarized. Furthermore，design principles for sintering additive glasses applicable to electroless-plated LTCC substrates are discussed，providing theoretical guidance for developing low-cost and high-reliability LTCC materials.

To meet the high demands of 500-kW electromagnetic propulsion systems on pulse power supplies in terms of energy density，conversion efficiency，and output stability，this paper presented a pulse power supply design based on a hybrid energy storage system combining supercapacitors and film capacitors. The power supply employed supercapacitor banks for energy storage and film capacitor banks for instantaneous high-power discharge. An efficient discharge topology ensured stable power transmission to the load module，while a three-level protection mechanism enhanced the safety and reliability of the discharge process. Experimental results indicate that the prototype achieves an energy density of 18.3Wh/kg，and a conversion efficiency of 91.74%. The pulse current overshoot is controlled within 5.00%. All these metrics satisfy the technical requirements of 500-kW class electromagnetic propulsion systems. The proposed pulse power supply effectively addresses issues such as low energy density，poor conversion efficiency，and insufficient load adaptability in existing medium-power electromagnetic propulsion pulse power supplies.

To address overheating risks in 3D stacked packaged chips caused by increased power consumption，a thermal resistance matrix-based method was proposed for junction temperature prediction，thereby supporting thermal design and management. A DDR3stacked chip was selected as the case study. Instead of relying on traditional experimental measurements，simulation modeling was utilized to obtain thermal characteristic parameters. Through structural analysis of the 3D configuration，a simulation model was developed using Icepak software. A JESD51-2-compliant thermal test environment was designed to characterize the thermal resistance matrix. Junction temperatures of each chip layer under varying conditions were predicted，and the results demonstrate prediction errors of less than 1% compared to simulation results. This method enables efficient thermal characterization and provides valuable insights for thermal management of 3D stacked chips.

Biaxially oriented polypropylene（BOPP）exhibits superior energy conversion efficiency and remarkable power density. However，its inherently low dielectric constant fundamentally limits its energy storage capacity，thereby impeding its applications in power storage systems，smart manufacturing，and aerospace engineering. In this study，oxygen plasma treatment was systematically employed to modify the surface of BOPP films，which effectively increased the number of oxygen-containing functional groups on the film surface and enhanced its hydrophilicity. Subsequently，the electrical properties of the modified BOPP films were comprehensively characterized，and the influence of plasma treatment time on these properties was quantitatively investigated. The results indicate that with the extension of plasma treatment time，the dielectric constant of BOPP films increased monotonically from 2.20 to 2.37.When the treatment time was 5min，the breakdown strength and discharge energy density of the modified films reached 785.7MV·m^-1 and 6.78J·cm^-3，respectively. This work provides a feasible and novel strategy for the development of dielectric films with high energy storage performance，laying a foundation for their broader application in the advanced energy storage scenarios.

To address the limitations of traditional quality management methods in processing and analyzing massive data for electronic components，this study aims to establish an intelligent quality monitoring mechanism for enhancing the accuracy and reliability of quality assessment. A novel dual-model framework integrating quality monitoring and fault prediction was established using the whole-life-cycle multi-source data: 1）A quality assessment model employing hyperparameter-optimized machine learning algorithms was constructed，utilizing six-dimensional feature data covering factory inspection，in-process quality assurance，and defect records；2）A fault prediction model was designed based on a backpropagation（BP）neural network to enable dynamic early warnings. Experimental validation on JZC-084 electromagnetic relays and J599F26D low-frequency connectors demonstrated that the proposed method achieved a fault prediction error rate lower than 0.1% and a quality assessment accuracy of 95.1%，which exceeded technical specifications. Verification via the random forest classifier showed average precision，recall，and F1-score values of 83.6%，81.2%，and 78.3%，respectively. This data-driven approach significantly enhances scientific decision-making in quality management through real-time monitoring and cross-departmental data synergy. Future work will focus on model parameter optimization and scenario expansion to enhance prediction comprehensiveness.

Addressing the issues of power-on interference pulses and dV/dt noise in gate drivers for brushless direct current motors，a high-reliability，low-power gate driver with a certain degree of dV/dt noise immunity was designed. The implemented circuit employs a high-side PMOS architecture，ensuring sufficient dead-time by feeding back the gate voltage to two sets of latches. An SR latch incorporating intentional skew design was implemented and combined with the preceding logic stage to suppress dV/dt-induced noise. In the level-shifting circuit，both current mirror and capacitive coupling structures were used to achieve voltage feedback from the high side to the low side while adaptively adjusting the input narrow pulse width. The addition of a power-on detection module resolves interference pulses generated during initial power-on，enhancing robustness and reducing power consumption. The proposed gate driver was fabricated in a 0.25 μm process and operates with a supply voltage range of 30V to 60V. At 25 ℃ in the typical process corner，aminimized dead time of approximately 12ns is achieved while driving a 1A current-capable power stage with a multi-stage buffer，ensuring dead-time sufficiency is maintained.

To address the limitations of conventional opamp-free bandgap reference architectures—specifically their high temperature coefficient and insufficient power supply rejection ratio（PSRR）performance，which fail to meet high-precision application requirements—a high-PSRR bandgap reference circuit with segmented curvature compensation was designed. The proposed bandgap reference circuit adopts a voltage self-regulation structure，which suppresses power supply ripple in the low-frequency range through a negative feedback loop and enhances the anti-interference capability of the output voltage. Furthermore，a PTAT²（proportional to absolute temperature squared）compensation circuit was integrated to generate a compensation current，enabling segmented curvature compensation and thus realizing a significant reduction in the temperature coefficient. The proposed bandgap reference circuit was designed based on the SMIC 0.18 μm CMOS process. Simulation results indicate that，at an operating voltage of 3.3V，the bandgap reference output voltage is 1.197V；over the temperature range of-45 ℃ to 125 ℃，the temperature coefficient is 5.38×10^-6/℃. The PSRR of this bandgap reference at low frequencies reaches-103dB，and the circuit has a quiescent current of 14.8 μA.

With the continuous development of tactile sensing technology，the application of piezoelectric materials in tactile sensors has garnered increasing attention. Currently，tactile sensors face challenges such as low recognition accuracy，insufficient response sensitivity，and poor stability in complex environments. To address these issues，research was conducted on utilizing the piezoelectric properties of polyvinylidene difluoride（PVDF）to convert external force signals into electrical signals for sensor design. Additionally，a microcontroller was utilized for real-time acquisition and storage of data collected by tactile sensors. At the same time，the improved Back Propagation（BP）neural network was combined withParticle Swarm Optimization（PSO）to enhance signal processing and recognition capabilities. The sensitivity and response accuracy of the sensor were significantly improved through the design of a PVDF multilayer structure. The results show that the classification performance（accuracy 98.54%，recall 98.13%，F1 value 97.42%）is significantly better than that of the comparison algorithm，and the highest recognition accuracy of the sensor for different roughness and hardness items reaches 95% and 96%，respectively，with a maximum root mean square error（RMSE）of only 0.032.In summary，the design of a PVDF piezoelectric film and single-chip tactile sensor based on the improved BP has effectively improved the response accuracy of tactile sensors under different tactile stimuli，with high perceptual sensitivity and stability. This further promotes the application and development of intelligent robots in precision operations and complex tasks.

The limited energy density of supercapacitors poses significant constraints on their practical applications. To address this issue，in this study，the hydrothermal method was used to grow an anthracene-based covalent organic framework（DaTp-COF）in-situ on the surface of graphene oxide（GO），and a novel DaTp/rGO composite electrode material was prepared. The structure，morphology，and electrochemical properties of the material were systematically characterized. The results reveal that the DaTp/rGO composite possesses a unique hierarchical porous structure with micropores，mesopores，and macropores. Meanwhile，the electron-withdrawing effect of the anthracene groups in the structure induces apseudocapacitive response of the Schiff base groups. Benefiting from this，in a three-electrode system with a 0.5mol·L^-1 sulfuric acid electrolyte，the specific capacitance of DaTp/rGO electrode reaches 251F·g^-1 at a current density of 1A·g^-1，which is significantly higher than that of rGO electrode material. In the ionic liquid electrolyte system，the DaTp/rGO electrode only exhibits the characteristics of electric double layer capacitance. However，owing to its excellent hierarchical pore structure，the electrode's specific capacitance is still as high as 158F·g^-1 at a current density of 1A·g^-1，and the capacitance retention rate is 78.82% after 10000 cycles. This study used the in-situ growth method to achieve the synergy between DaTp-COF and rGO，providing new ideas for the research and development of high-performance supercapacitor electrode materials，and helping supercapacitors break through their application limitations.

Piezoelectric inkjet printing technology is widely employed in various fields，including 3D printing，electronics manufacturing，and biomedical applications，owing to its advantages such as high precision，low noise，and borad material adaptability. The driving power supply is a critical component of piezoelectric inkjet systems，as the driving pulse waveform it applies to the piezoelectric ceramics determines the quality of the inkjet-printed products. However，existing driving power supplies face challenges such as generating only unipolar voltage waveforms and exhibiting poor compatibility，making it difficult to meet the personalized requirements of different types of piezoelectric printheads for driving signals. To address these issues，an adjustable high-voltage driving power supply circuit based on an FPGA chip was designed. The proposed circuit incorporates a polarity conversion module to switch the polarity of the driving waveform and a two-stage amplification circuit combining amplifiers and transistor amplifiers to achieve voltage amplification. Additionally，control code was developed and simulations were conducted to validate the effectiveness of the driving power supply. The proposed circuit not only facilitates the generation and amplification of low-voltage pulse signals but also successfully outputs bipolar trapezoidal waves with adjustable gain. Simulation results demonstrate that the driving power supply can generate adjustable bipolar pulse signals with a rise time of 20 μs，a voltage amplitude of±170V，and a frequency of 4.17kHz. Furthermore，it supports the simultaneous operation of multiple nozzles under a 2nF load condition.