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The Design of A High-Speed and High-Performance 64 APSK Modulator Based on FPGA
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Jianfei WANG1, Ming SHEN1, Xia LUO1, Chengwu YANG1, Hang GUO1, 2
Journal of Telemetry, Tracking and Command | 2025, 46(5) : 134 - 141
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Journal of Telemetry, Tracking and Command | 2025, 46(5): 134-141
• TT & C Communication and Navigation •
The Design of A High-Speed and High-Performance 64 APSK Modulator Based on FPGA
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Jianfei WANG1, Ming SHEN1, Xia LUO1, Chengwu YANG1, Hang GUO1, 2
Affiliations
  • 1.Beijing Research Institute of Telemetry, Beijing 100076, China
  • 2.College of Electronics and Information Engineering, Harbin Institute of Technology, Harbin 150001, China
Published: 2025-09-15 doi: 10.12347/j.ycyk.20250402001
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With the rapid development of satellite communication technology, the volume of data transmitted between satellites and ground stations continues to increase, driving higher demands for signal transmission rates and quality. In traditional modulators, due to limitations such as DAC(Digital-to-Analog Converter)sampling rates and shaping filter technologies, low-order modulation is often adopted, resulting in lower signal transmission rates that cannot meet the requirements of future high-speed transmission. Therefore, a 16-channel parallel shaping filter technology with a continuously variable transmission rate is proposed in this paper. This technology employs 64APSK(Amplitude Phase Shift Keying)modulation to achieve high-speed data transmission. Experimental results show that, based on the existing hardware platform, data transmission at a rate of 7.2 Gbps is achieved with a 4.8 GHz DAC sampling rate, and the EVM (Error Vector Magnitude)is as low as 2.029 9%. Compared to the original high-speed modulator architecture, this technology offers advantages such as high transmission rates, good signal quality, and low resource consumption, making it a valuable reference for the design of future systems for data transmission exceeding 10 Gbps.

64 APSK  /  Modulator  /  Parallel shaping filter technology  /  EVM
Jianfei WANG, Ming SHEN, Xia LUO, Chengwu YANG, Hang GUO. The Design of A High-Speed and High-Performance 64 APSK Modulator Based on FPGA[J]. Journal of Telemetry, Tracking and Command, 2025 , 46 (5) : 134 -141 . DOI: 10.12347/j.ycyk.20250402001
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Article Info
doi: 10.12347/j.ycyk.20250402001
  • Receive Date：2025-04-02
  • Online Date：2026-03-13
  • Published：2025-09-15
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  • Received：2025-04-02
  • Revised：2025-04-07
Affiliations
    1.Beijing Research Institute of Telemetry, Beijing 100076, China
    2.College of Electronics and Information Engineering, Harbin Institute of Technology, Harbin 150001, China
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