With the continuous advancement of radar technology, broadband phased array radar has been widely applied in fields such as remote sensing, environmental monitoring, and 5G base station communications due to its high resolution, multi-tasking capability, and adaptability to complex electromagnetic environments. However, traditional phased array radars rely on phase shifters to control beam direction, which can lead to beam squint in broadband applications, ultimately reducing detection accuracy. To address this issue, this paper presents a high-area-efficiency true time delay (TTD) circuit based on an artificial transmission line(ATL) delay unit. Fabricated using a 0.13 μm SiGe BiCMOS process, the TTD circuit operates across the frequency range from S to Ku bands and features a 6-bit digital delay control, achieving a minimum delay resolution of 6 ps and a maximum delay of 378 ps. The circuit incorporates delay reference paths with T-type and π-type attenuator structures, ensuring optimal gain matching with the delay units. Additionally, by integrating passive switches and distributed cascaded gain equalizers, the design enhances delay accuracy and gain flatness. Through HFSS optimization of spacing of inductors in the ATL delay unit, the layout efficiently reduces inductor area consumption. As a result, the fabricated chip measures only 3 mm × 0.9 mm, offering a delay density of 141.6 ps per unit area. Measurement results show that the root mean square (RMS) delay error across all states is less than 5.9 ps, while the circuit exhibits a gain performance of -5.5 to -1 dB within its operating frequency range under a 2.5V power supply. This work makes a significant contribution to the development of high-performance phased array radar systems.