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A memristor synthesis framework optimized by BDD reordering
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Peng LIU, Yajun ZHU, Lian YAO, Jigang WU
Journal of Xi'an University of Posts and Telecommunications | 2025, 30(6) : 68 - 76
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Journal of Xi'an University of Posts and Telecommunications | 2025, 30(6): 68-76
A memristor synthesis framework optimized by BDD reordering
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Peng LIU, Yajun ZHU, Lian YAO, Jigang WU
Affiliations
  • School of Computer Science and Technology,Guangdong University of Technology,Guangzhou 510006,China
Published: 2025-11-10 doi: 10.13682/j.issn.2095-6533.2025.06.008
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To address the issue of excessive hardware overhead that arises when mapping binary decision diagrams(BDD)to memristor crossbar arrays within path-based memristive logic computing frameworks,a memristive logic synthesis framework based on BDD reordering optimization is proposed.The framework pioneers the application of the adaptive restart genetic algorithm(ARGA)to BDD variable order optimization,which generates BDD structures more suitable for mapping to memristor crossbar arrays,while its built-in adaptive restart mechanism ensures the efficiency of this optimization process which further optimizes the number of rows and columns in the mapped crossbar array,thereby effectively reducing hardware area.Evaluations were conducted on 17 benchmark circuits,and the experimental results show that compared with the original memristive logic framework,the proposed method reduces crossbar area by 15%,operation energy consumption by 26%,and latency by 12%.Moreover,in comparison with other memristive logic frameworks such as COMPACT and CONTRA,the proposed method reduces operation energy consumption by 3 and 4 orders of magnitude respectively,and decreases latency by 80%and 97%,respectively.Through the collaborative optimization of BDD structures and memristor array mapping constraints,this research provides an effective approach to enhance the synthesis efficiency of memristive logic circuits.

in-memory computing  /  memristor  /  binary decision diagrams  /  genetic algorithm  /  logic synthesis
Peng LIU, Yajun ZHU, Lian YAO, Jigang WU. A memristor synthesis framework optimized by BDD reordering[J]. Journal of Xi'an University of Posts and Telecommunications, 2025 , 30 (6) : 68 -76 . DOI: 10.13682/j.issn.2095-6533.2025.06.008
Year 2025 volume 30 Issue 6
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doi: 10.13682/j.issn.2095-6533.2025.06.008
  • Receive Date:2025-08-17
  • Online Date:2026-04-16
  • Published:2025-11-10
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  • Received:2025-08-17
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    School of Computer Science and Technology,Guangdong University of Technology,Guangzhou 510006,China
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鹅膏菌科Amanitaceae 2 11 5.26 鹅膏菌属 Amanita 10 4.78
小菇科 Mycenaceae 2 12 5.74 丝盖伞属 Inocybe 5 2.39
多孔菌科 Polyporaceae 8 14 6.70 蜡蘑属 Laccaria 5 2.39
红菇科 Russulaceae 3 23 11.00 小皮伞属 Marasmius 6 2.87
小菇属 Mycena 11 5.26
光柄菇属 Pluteus 5 2.39
红菇属 Russula 17 8.13
栓菌属 Trametes 5 2.39
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