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Heterogeneous multi-core task scheduling based on adaptive simulated annealing
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Guoliang ZHU1, Jinjian ZHANG2, Xuan LIU2, Guojun WANG2, Xiaodong ZHANG2, Kaiyu CHEN3, Yu WANG3, *
Journal of Systems Engineering and Electronics | 2026, 37(3) : 897 - 903
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Journal of Systems Engineering and Electronics | 2026, 37(3): 897-903
• SYSTEMS ENGINEERING •
Heterogeneous multi-core task scheduling based on adaptive simulated annealing
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Guoliang ZHU1, Jinjian ZHANG2, Xuan LIU2, Guojun WANG2, Xiaodong ZHANG2, Kaiyu CHEN3, Yu WANG3, *
Affiliations
  • 1School of Information and Electronics, Beijing Institute of Technology, Beijing 100081, China
  • 2Beijing Research Institute of Telemetry, Beijing 100076, China
  • 3School of Microelectronics, Northwestern Polytechnical University, Xi’an 710072, China
Published: 2026-06-18 doi: 10.23919/JSEE.2026.000042
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To address the energy consumption issues caused by task lengths in task scheduling on heterogeneous multi-core systems, this paper proposes an adaptive parameterized improved simulated annealing algorithm based on the directed acyclic graph task model. The algorithm employs feedback from acceptance rates to dynamically adjust the temperature and neighborhood size of the simulated annealing process. Additionally, it introduces a security mechanism to enhance convergence speed and global search capabilities. Compared against classical simulated annealing and standard heuristic algorithms, the proposed algorithm achieves reductions exceeding 54% in convergence generations, 50% in task slots, and 10% in scheduling time, providing a direction for low-power task scheduling.

heterogeneous multi-core  /  task scheduling  /  schedule length  /  simulated annealing
Guoliang ZHU, Jinjian ZHANG, Xuan LIU, Guojun WANG, Xiaodong ZHANG, Kaiyu CHEN, Yu WANG. Heterogeneous multi-core task scheduling based on adaptive simulated annealing[J]. Journal of Systems Engineering and Electronics, 2026 , 37 (3) : 897 -903 . DOI: 10.23919/JSEE.2026.000042
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1.　Introduction
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Heterogeneous multi-core processor chips [1], a prominent example of integrated circuits [2], find extensive applications in various emerging technologies [3], including artificial intelligence (AI) [4], big data [5], cloud computing [6], and the Internet of Things (IoT) [7]. The efficient scheduling of applications onto multiple processors for execution [8], while controlling system energy consumption through energy-saving techniques [9] and ensuring rational resource utilization alongside the high-performance advantages of multiprocessor systems [10], represents a critical focus in both academic and engineering domains. Employing global optimization algorithms to solve the problem of low-power task scheduling in multiprocessor systems demonstrates high efficiency and practicality [11]. Compared to non-heuristic algorithms [12], heuristic algorithms are widely used for solving multiprocessor energy optimization problems due to their advantages of simple implementation [13], strong adaptability, and fast computational speed [14–18].
The energy consumption of heterogeneous multi-core systems is co-determined by multiple factors, such as voltage and frequency [19], communication power [20], schedule length, and computational power [21]. Among these, the task schedule length significantly influences the total system energy consumption [22–24]. Consequently, reducing the schedule length represents an imperative need for addressing the energy optimization problem in task scheduling [25].
Currently, numerous researchers have conducted explorations and studies in the field of low-power task scheduling for heterogeneous multi-core systems based on classical heuristic algorithms [26], leading to the development of various hybrid and adaptive scheduling algorithms [27].
Zhou et al. [28] proposed an improved genetic-simulated annealing (SA) algorithm for scheduling ordered tasks with task duplication. In the enhanced genetic algorithm, the SA approach is employed to mitigate selection pressure, strengthen global convergence, and prevent the search process from being trapped in local optima. Cheng et al. [29] introduced a task scheduling algorithm for heterogeneous multi-core processors based on the crazy and adaptive salp swarm algorithm (CASSA). Aiming to minimize the overall task completion time, this algorithm designs an encoding scheme for task allocation according to task priority rules, demonstrating higher convergence efficiency and superior solution quality in addressing heterogeneous multi-core task scheduling problems. Feng et al. [30] presented an evolutionary adaptive bat algorithm (EABA), which incorporates an attenuated pulse strategy and an evolutionary adaptive mechanism. These strategies enhance the search capability of the bat population, prevent premature convergence to local optima, and thereby yield higher-quality solutions.
Given that existing heuristic scheduling algorithms for minimizing task completion time seldom consider flexible handling of dynamic changes or imperfect information in scheduling scenarios [31], thus limiting their practical applicability, this paper proposes an improved adaptive SA (ASA) algorithm to generate schedules with minimized execution time. By dynamically adjusting both temperature and neighborhood size parameters while incorporating a safety mechanism, the proposed approach enhances convergence speed and global search capability, ultimately achieving reduced schedule length and lower system energy consumption.
2.　Task scheduling model
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2.1　Task model
This paper uses a directed acyclic graph (DAG) to represent the application model. We define a set $ M=\left\{{m}_{1}, {m}_{2},\cdots ,{m}_{p}\right\} $ to denote the multiprocessor cores in the system. Fig. 1 shows an example application modeled as a DAG, containing 11 subtasks where each node represents one. The set of all subtasks is defined as $ N= \left\{{n}_{1},{n}_{2},\cdots ,{n}_{q}\right\} $. Due to processor heterogeneity, the execution time of a given subtask differs across processors, even at their maximum frequency. Consequently, we introduce a matrix $ {\mathrm{lengths}} $ of size $ p\cdot q $, whose element $ {\mathrm{lengths}}\left(i,j\right) $ represents the execution time of subtask $ {n}_{j} $ on processor $ {m}_{i} $.
2.2　Task scheduling and allocation model
The optimization process for task schedule length in heterogeneous multi-core processors, as illustrated in Fig. 2, aims to assign n subtasks $ N=\left\{{n}_{1},{n}_{2},\cdots ,{n}_{q}\right\} $ of an application to m distinct processing cores $ M=\left\{{m}_{1},{m}_{2},\cdots ,{m}_{p}\right\} $ according to a specific scheduling scheme. This is done under the premise of ensuring execution efficiency, with the goal of identifying the shortest possible schedule length through a scheduling algorithm, thereby achieving reduced energy consumption and efficient resource utilization.
In matrix $ {\mathrm{lengths}} $, each row corresponds to one processor, and each column corresponds to one subtask. Therefore, element $ {\mathrm{lengths}}\left(i,j\right) $ represents the processing time of subtask $ {n}_{j} $ on processor $ {m}_{i} $. A scheduling matrix $ {\bf{schedule}}\in {{\bf{Z}}}^{p\times q} $ is defined, where each row represents the task queue of a processor. Element $ {\mathrm{schedule}}\left(i,k\right)= j $$ \left(j\neq 0\right) $ indicates that location $ k $ on processor $ {m}_{i} $ is allocated to task $ {n}_{j} $, while element $ {\mathrm{schedule}}\left(i,k\right)=0 $ indicates that location $ k $ is unassigned.
For a given processor $ {m}_{i} $，all assigned task indices are retrieved as follows:
$ {S}_{i}=\left\{j|{\mathrm{schedule}}\left(i,k\right)=j,k=1,2,\cdots ,q\right\}. $
The total processing time is given by the cumulative sum of the processing times for all its tasks:
$ {T}_{i}=\sum\limits_{j\in {S}_{i}}{\mathrm{lengths}}\left(i,j\right). $
The makespan, which is the maximum completion time among all processors, serves as the scheduling length for the subtask set and constitutes the objective function value:
$ {\mathrm{makespan}}=\max \left({T}_{1},{T}_{2},\cdots ,{T}_{p}\right).$
3.　ASA scheduling algorithm
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The classical SA algorithm offers distinct advantages in processor task scheduling problems due to its powerful global optimization capability, flexibility in handling complex constraints, and dynamic balance between exploration and exploitation. However, when applied to task scheduling on heterogeneous multi-core processors, the classical SA exhibits several limitations: a fixed cooling rate often leads to insufficient high-temperature phases or excessively long low-temperature phases; a fixed neighborhood size struggles to balance global search and local optimization; and uncontrolled parameters can cause algorithmic instability. This paper proposes an ASA scheduling algorithm. In addition to introducing dynamic temperature and neighborhood adjustment strategies guided by the monitoring of acceptance rate feedback to balance exploration and exploitation and avoid premature convergence, the algorithm also incorporates a safety mechanism and an adaptive cooling strategy. The optimized scheduling algorithm demonstrates significant superiority over classical SA in terms of convergence speed, solution quality, robustness, and interpretability, making it particularly suitable for multi-processor task scheduling problems.
3.1　Algorithmic framework
Fig. 3 shows the flowchart for the ASA scheduling algorithm.
The algorithm is described as follows:
Step 1　An initial solution is generated by allocating tasks uniformly across processors to ensure load balancing. The algorithm parameters are set as follows: initial temperature $ {T}_{0}=20\;000 $, neighborhood size $ {N}_{{\mathrm{size}}}=5 $, cooling rate $ \alpha =0.95 $, and target acceptance ratio $ \beta =0.25 $.
Step 2　New solutions are generated by a dynamic neighborhood strategy. The strategy for dynamic neighborhood adjustment is selected based on the acceptance rate feedback, employing hybrid neighborhood operations (such as task relocation or task exchange), while ensuring solution validity.
Step 3　The dynamic temperature adjustment strategy adaptively tunes its parameters by comparing the current and target acceptance rates to select an appropriate strategy.
Step 4　The SA algorithm commences its iterative process. The loop is exited immediately upon satisfaction of the convergence criteria, outputting the incumbent optimal scheduling solution.
3.2　Adaptive neighborhood strategy
Neighborhood size defines the scope of new solutions generated per iteration, with larger sizes enabling exploration and smaller ones favoring local refinement. Acknowledging the limitation of classical SA, its reliance on a fixed neighborhood size $ {N}_\text{size} $ and a single operation, which hampers the exploration-exploitation balance, this paper introduces a strategy that dynamically adjusts the neighborhood size and hybridizes operations according to the current acceptance rat $ {P}_\text{accept} $.
The neighborhood size is dynamically adjusted as a function of $ {P}_\text{accept} $ to balance exploration and exploitation. An increase in $ {P}_\text{accept} $ leads to a larger neighborhood, thereby promoting exploration; conversely, the neighborhood is narrowed to concentrate on exploitation. The formula governing this adjustment is described below:
$ N_\text{size}^\text{new}={N}_\text{size}+2 \left({P}_\text{accept}-\beta \right). $
The constant 2, which serves as the sensitivity coefficient, controls the magnitude of the adjustment.$ {P}_\text{accept} $ represents the current acceptance rate, defined as the proportion of solutions accepted within the current window. Parameter $ {N}_{\min }=2,{N}_{\max }=12 $ is defined to ensure that the neighborhood size remains within a reasonable range, thereby preventing excessive adjustments.
To mitigate oscillations and prevent abrupt changes, the actual neighborhood size is updated using a weighted average approach.
$ N_\text{size}^{\prime}=0.3N_\text{size}^\text{new}+0.7{N}_\text{size} $
In SA, a neighborhood operation refers to the mechanism employed to generate new candidate solutions from the current solution. Common neighborhood operations include task moving (relocating a task from one processor to another) and task swapping (exchanging tasks between two processors). This paper adopts a hybrid neighborhood operation that integrates the move operation with the swap operation. Specifically, a random number $ \mu \in \left(0,2\right) $ is generated. When condition $ \mu \leq 1 $ is met, the task move operation is executed, transferring a task from a heavily-loaded processor to a lightly-loaded one to optimize load balancing. When condition $ \mu \gt 1 $ is satisfied, the task swap operation is performed, which randomly exchanges tasks to enhance the diversity of the solution space, thereby mitigating the issue of low search efficiency associated with using a single neighborhood operation.
3.3　Adaptive temperature policy
In SA, the temperature parameter controls the probability of accepting inferior solutions. At high temperatures, the algorithm accepts more suboptimal solutions, facilitating a broad exploration of the solution space; at low temperatures, it shifts focus to local refinement, driving convergence towards high-quality solutions. The dynamic temperature adjustment strategy aims to adaptively optimize the cooling rate in real-time through a feedback mechanism, enabling the algorithm to autonomously balance the trade-off between exploration and exploitation during the search process.
The temperature update formula of the proposed dynamic temperature adjustment strategy is as follows:
$ {T}_\text{new}=\max \left\{100,{T}_\text{old}\cdot \exp \left[{C}_{R}\cdot \left({T}_{F}-1\right)\right]\right\}. $
The constant 100 ensures that the temperature does not fall below this threshold, thereby preventing the algorithm from stalling due to an excessively small value.$ {C}_{R} $ is a dynamically adjusted cooling rate, which assumes different values based on $ {P}_\text{accept} $, as defined below:
$ {C}_{R}=\begin{cases} 0.98,\;\;{P}_\text{accept} \lt 0.1\\0.85,\;\;{P}_\text{accept} \gt 0.4\\0.93,\;\;{P}_\text{accept}\in \left[0.1,0.4\right]\end{cases}. $
When condition $ {P}_\text{accept} \lt 0.1 $ leads to outcome $ {C}_{R}= 0.98 $, a slower cooling rate is employed, with the high-temperature stage prolonged to facilitate sufficient exploration. Conversely, when condition $ {P}_\text{accept} \gt 0.4 $ results in outcome $ {C}_{R}=0.85 $, the cooling rate is accelerated to achieve rapid convergence to high-quality solutions. Under condition $ {C}_{R}\in \left[0.1,0.4\right] $, the default cooling rate (0.93) is applied to maintain a balance between exploration and exploitation.
Factor $ {T}_{F} $, which is a scaling factor computed based on the difference between $ {P}_\text{accept} $ and $ \beta $, is defined as follows:
$ {T}_{F}=1+\frac{\beta -{P}_\text{accept}}{\max \left(\beta ,\varepsilon \right)} $
where $ \varepsilon $ is a small constant to prevent division by zero. As derived from (8), when $ \beta \gt {P}_\text{accept} $ leads to $ {T}_{F} \gt 1 $, the exponent term in (7) becomes greater than 0, resulting in a temperature increase; conversely, it leads to a temperature decrease.
4.　Simulation and experimental analysis
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4.1　Verification environment and experimental setup
To validate the superiority of the proposed ASA scheduling algorithm in the field of heterogeneous multi-core low-power computing, experiments are conducted utilizing the Windows Subsystem for Linux (WSL) running the Ubuntu 22.04.3 LTS distribution to create DAG models via the TGFF tool. The host system is Windows 10 Version 22H2. Subsequent simulations are performed under the Windows 10 operating system, with the hardware platform configured with an Intel Core i7-12700H processor and 32 GB of RAM.
This study designs two sets of simulation experiments to verify the effectiveness of the proposed algorithm. The first set comprises a comparative experiment on convergence generation and the number of task slots, while the second set involves a comparative analysis of scheduling time. The benchmark for comparison in these experiments is the classical SA algorithm.
The experimental parameters are configured as follows: initial temperature $ {T}_{0}=20\;000 $, neighborhood size $ {N}_\text{size}=5 $, cooling rate $ \alpha =0.95 $, target acceptance rate $ \beta =0.25 $.
4.2　Impact of task slot number on convergence iterations
To evaluate the convergence generation of the proposed algorithm compared to classical SA in multi-processor task scheduling, as well as the effectiveness of the resulting optimal schedule in terms of the number of task slots per processing core, five distinct DAGs are randomly generated using the TGFF tool. Five comparative experiments are conducted accordingly.
Fig. 4 presents a comparison between SA and the proposed algorithm regarding the convergence generation and the number of task slots per core for the five randomly generated task sets. Here, ASA denotes the algorithm proposed in this paper. It can be observed that, when considering both convergence speed and task slot allocation, the proposed algorithm achieves a balanced low-power demand across different metrics in all experimental groups, demonstrating significantly higher efficiency compared to SA.
Table 1 and Table 2 respectively demonstrate the superior performance of the proposed algorithm over SA in terms of convergence generation and the number of task slots. The results show that across five randomly generated DAG task scheduling scenarios, ASA reduces the convergence generation by more than 54% (up to 95%) and decreases the number of task slots by over 50% compared to SA.
4.3　Scheduling time comparison experiment
To demonstrate the optimization effect of ASA compared to SA in terms of scheduling time in task scheduling, as well as its effective balance among the three metrics convergence generation, number of task slots, and scheduling time, a comparative experiment on scheduling time is conducted using the five DAG task graphs from Subsection 3.2.
Fig. 5 illustrates the comparison of scheduling times between ASA and SA. It can be observed that the proposed algorithm demonstrates consistent effectiveness in reducing scheduling time across randomly generated task scheduling scenarios, meeting energy-saving requirements for tasks of various complexity levels. As shown in Table 3, which compares scheduling times before and after algorithm optimization, ASA reduces scheduling time by over 20% compared to SA in tasks with lower complexity, while for highly complex tasks, the reduction remains above 10%. These results further validate the significant superiority of the proposed algorithm in global optimization capability and its high stability when applied to task scheduling across varying complexity levels.
5.　Conclusions
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This study addresses the issue of low-power task scheduling in current heterogeneous multi-core processors. Considering the significant impact of task scheduling length on energy consumption, a mathematical model for optimizing task scheduling length is established based on the DAG. To solve this model, an improved SA scheduling algorithm with adaptive parameters is proposed. By utilizing feedback from the current acceptance rate, the algorithm dynamically adjusts the neighborhood size and temperature, while incorporating safety mechanisms such as neighborhood size clamping and minimum temperature protection. These enhancements lead to accelerated convergence speed and improved global optimization capability. Experimental results demonstrate that the proposed algorithm is well-suited for low-power task scheduling in heterogeneous multi-core processors, exhibiting significant superiority across various performance metrics, along with the flexibility to be applied to complex engineering optimization problems.
However, although the proposed adaptive scheduling algorithm achieves favorable results in optimizing task scheduling length for heterogeneous multi-core processors, it does not fully account for other multi-processor low-power task scheduling problems with complex constraints. In practical applications, dependency constraints among tasks and other conditional restrictions can substantially influence task scheduling outcomes. Therefore, future research will focus on solving multi-processor low-power task scheduling problems under complex constraints.
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Appendix
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Year 2026 volume 37 Issue 3
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doi: 10.23919/JSEE.2026.000042
  • Receive Date：2025-10-23
  • Online Date：2026-08-14
  • Published：2026-06-18
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  • Received：2025-10-23
Affiliations
    1School of Information and Electronics, Beijing Institute of Technology, Beijing 100081, China
    2Beijing Research Institute of Telemetry, Beijing 100076, China
    3School of Microelectronics, Northwestern Polytechnical University, Xi’an 710072, China

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WANG Yu
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