The high peak-to-average ratio of low-frequency pulse power loads seriously affects the safe and stable operation of airborne power supply systems. The conventional approach requires stacking numerous energy storage capacitors due to the DC bus voltage ripple limitation, which substantially increases the system’s volume. Although current active pulse power suppression method can reduce the required capacitance by increasing voltage fluctuations, the considerable power ratings and additional power processing stages of active suppression circuits impact system efficiency significantly.

This paper presents a low-frequency pulse power active suppression method based on voltage compensation. The active suppression circuit is inserted between the DC bus and the energy storage capacitor C_d. By compensating for the voltage difference between C_d and DC bus with the output voltage v_s of the active suppression circuit, the voltage range of C_d is not constrained by the DC bus, allowing for a reduction in C_d. Since the active suppression circuit only compensates for capacitor voltage fluctuations, its power rating and losses are much smaller than the average power of pulse loads, which greatly reduces the volume, weight, and losses. The active suppression circuit takes power from the DC bus. Considering that its input and output terminals are non-common ground and have a wide output voltage range, the LLC-DC transformer (DCX) cascaded Buck converter is chosen for the active suppression circuit. The LLC-DCX functions operate in an open loop as a high- frequency DC transformer, and a dual-loop control strategy is implemented for the Buck converter. The outer voltage loop adjusts the voltage fluctuation range of C_d, while the inner current loop suppresses the input current ripple.

The design guidelines for key parameters are also presented, with size and efficiency as the main considerations. The size of the power supply is influenced by C_d, while the power rating of the active suppression circuit affects system efficiency. Therefore, a detailed study of both aspects is conducted. The results reveal that once the load is determined, C_d decreases as the voltage fluctuation Δv_d increases, and the decreasing rate gradually slows. Additionally, the power rating of the active suppression circuit increases linearly with the average voltage V_dav and Δv_d. The lower limit of V_dav is also affected by Δv_d to ensure that the output voltage of the Buck converter remains positive. Therefore, a balance must be achieved between V_dav and Δv_d to optimize capacitance and power rating.

An experimental prototype is constructed. The experimental results are consistent with the theoretical analysis, and the active suppression circuit effectively regulates the voltage fluctuation range of C_d and suppresses the input current. Efficiency tests reveal that the active suppression scheme maintains an efficiency above 98.1% throughout the entire range, with a peak efficiency reaching 99.1%. This scheme is compared with existing active suppression schemes, showing clear advantages. In addition, results from various literature are normalized and compared.