Article(id=1241719222749942559, tenantId=1146029695717560320, journalId=1146032081894723586, issueId=1241719216169079576, articleNumber=null, orderNo=3, doi=10.3981/j.issn.2097-0781.2023.01.002, pmid=null, cstr=null, oa=null, hot=null, price=null, onlineType=0, articleFormat=0, articleType=null, articleTypeStr=research-article, receivedDate=1672416000000, receivedDateStr=2022-12-31, revisedDate=1675008000000, revisedDateStr=2023-01-30, acceptedDate=null, acceptedDateStr=null, onlineDate=1679587200000, onlineDateStr=2023-03-24, pubDate=1679241600000, pubDateStr=2023-03-20, doiRegisterDate=null, doiRegisterDateStr=null, onlineIssueDate=1679587200000, onlineIssueDateStr=2023-03-24, onlineJustAcceptDate=null, onlineJustAcceptDateStr=null, onlineFirstDate=null, onlineFirstDateStr=null, sourceXml=null, magXml=null, createTime=1773978532727, creator=sys-migrate, updateTime=1773978532727, updator=sys-migrate, issue=Issue{id=1241719216169079576, tenantId=1146029695717560320, journalId=1146032081894723586, year='2023', volume='2', issue='1', pageStart='5', pageEnd='143', issueExtLink='null', onlineDate='null', pubDate='null', beforeIssueId=null, nextIssueId=null, price=null, status=1, issueComplete=1, articleOrder=1, issueType=-1, specialIssue=1, createTime=1773978531159, creator=sys-migrate, updateTime=1774001248771, updator=13041195026, preIssue=null, nextIssue=null, ext={EN=IssueExt(id=1241814500781916967, tenantId=1146029695717560320, journalId=1146032081894723586, issueId=1241719216169079576, language=EN, specialIssueTitle=Science and Technology Foresight, coverIllustrator=null, specialIssueEditor=null, specialIssueAbout=null), CN=IssueExt(id=1241814500781916968, tenantId=1146029695717560320, journalId=1146032081894723586, issueId=1241719216169079576, language=CN, specialIssueTitle=形式化方法与复杂计算系统可信保障, coverIllustrator=null, specialIssueEditor=null, specialIssueAbout=null)}, issueFiles=null}, startPage=23, endPage=32, ext={EN=ArticleExt(id=1241719228898800381, articleId=1241719222749942559, tenantId=1146029695717560320, journalId=1146032081894723586, language=EN, title=Formal Verification of Circuit Design, columnId=1149656489310208610, journalTitle=Science and Technology Foresight, columnName=Review and Commentary, runingTitle=null, highlight=null, articleAbstract=

The verification of circuit design is to check its correctness and safety, which is vital in the circuit design process and occupies almost half of the cost and time. Formal verification is one of the important ways to guarantee the correctness and safety of software and hardware systems of computers and has been applied to circuit design verification. The electronic design automation (EDA) software from three global EDA giants, i.e., Cadence, Synopsis, and Siemens, all includes mature formal verification tools for circuit design. This paper summarizes the current status of the formal verification of circuit design, analyzes its challenges, discusses its perspectives and trends, and proposes suggestions on its development in China.

, correspAuthors=Zhilin WU, authorNote=null, correspAuthorsNote=
, copyrightStatement=null, copyrightOwner=null, extLink=null, articleAbsUrl=null, sourceXml=null, magXml=null, pdfUrl=null, pdf=null, pdfFileSize=null, pdfExtLink=null, richHtmlUrl=null, mobilePdfUrl=null, reviewReport=null, pdfFirstPage=null, abstractGraph=null, abstractGraphContent=null, abstractVideo=null, citation=null, cebUrl=null, magXmlContent=null, mapNumber=null, authorCompany=null, fund=null, authors=null, authorsList=Bohua ZHAN, Zhilin WU), CN=ArticleExt(id=1241719228772971258, articleId=1241719222749942559, tenantId=1146029695717560320, journalId=1146032081894723586, language=CN, title=芯片设计形式验证, columnId=1148708266483446458, journalTitle=前瞻科技, columnName=综述与述评, runingTitle=null, highlight=null, articleAbstract=

芯片设计验证是对芯片设计是否正确与安全进行检查,在芯片设计流程中具有非常重要的地位,占其将近1/2的成本和时间。形式验证是保证计算机软硬件系统正确性与安全性的非常重要的手段,已经成功用于芯片设计验证。全世界三大电子设计自动化(EDA)软件厂商Cadence、Synopsis、Siemens的EDA软件均包含成熟的芯片设计形式验证工具。文章总结了芯片设计形式验证发展现状,分析了面临的挑战,展望了发展趋势,并对其在中国的发展提出建议。

, correspAuthors=吴志林, authorNote=null, correspAuthorsNote=
, copyrightStatement=null, copyrightOwner=null, extLink=null, articleAbsUrl=null, sourceXml=etsd3Ud3mCy5QC3AXV6mOA==, magXml=vDBoJtaHBMYXtHWdMYwDgA==, pdfUrl=null, pdf=f/H3iYBd3nTKV+/GZqCHDQ==, pdfFileSize=2157986, pdfExtLink=null, richHtmlUrl=null, mobilePdfUrl=null, reviewReport=null, pdfFirstPage=null, abstractGraph=null, abstractGraphContent=null, abstractVideo=null, citation=null, cebUrl=null, magXmlContent=RwLPigP5CTmwJjszKqUjuw==, mapNumber=null, authorCompany=null, fund=null, authors=

詹博华,副研究员。中国计算机学会形式化方法专业委员会执行委员。主要研究方向为交互式定理证明、嵌入式系统的建模和验证。在形式化方法领域的主要会议和期刊发表论文30余篇。电子信箱:

吴志林,研究员,博士研究生导师。中国计算机学会形式化方法专业委员会副秘书长。主要研究方向为计算逻辑、自动机理论、计算机软硬件系统的形式验证。先后承担国家重点研发计划、中国科学院A类战略性先导科技专项、中央军委装备发展部预研领域基金、国家自然科学基金等项目10余项。获CCF-IEEE CS青年科学家奖。发表论文40余篇。电子信箱:

, authorsList=詹博华, 吴志林)}, authors=[Author(id=1241719233952936768, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, orderNo=0, firstName=null, middleName=null, lastName=null, nameCn=null, orcid=null, stid=null, country=null, authorPic=null, dead=0, email=bzhan@ios.ac.cn, emailSecond=null, emailThird=null, correspondingAuthor=0, authorType=1, ext={EN=AuthorExt(id=1241719234024239938, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, authorId=1241719233952936768, language=EN, stringName=Bohua ZHAN, firstName=Bohua, middleName=null, lastName=ZHAN, prefix=null, suffix=null, authorComment=null, nameInitials=null, affiliation=null, department=null, xref=null, address=null, bio=null, bioImg=null, bioContent=null, aboutCorrespAuthor=null), CN=AuthorExt(id=1241719234103931715, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, authorId=1241719233952936768, language=CN, stringName=詹博华, firstName=null, middleName=null, lastName=null, prefix=null, suffix=null, authorComment=null, nameInitials=null, affiliation=null, department=null, xref=null, address=null, bio={"img":"3IUc1qq5uTmbMUG0d0MFjg==","content":"

詹博华,副研究员。中国计算机学会形式化方法专业委员会执行委员。主要研究方向为交互式定理证明、嵌入式系统的建模和验证。在形式化方法领域的主要会议和期刊发表论文30余篇。电子信箱:

"}, bioImg=3IUc1qq5uTmbMUG0d0MFjg==, bioContent=

詹博华,副研究员。中国计算机学会形式化方法专业委员会执行委员。主要研究方向为交互式定理证明、嵌入式系统的建模和验证。在形式化方法领域的主要会议和期刊发表论文30余篇。电子信箱:

, aboutCorrespAuthor=null)}, companyList=null), Author(id=1241719234162651974, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, orderNo=1, firstName=null, middleName=null, lastName=null, nameCn=null, orcid=null, stid=null, country=null, authorPic=null, dead=0, email=wuzl@ios.ac.cn, emailSecond=null, emailThird=null, correspondingAuthor=1, authorType=1, ext={EN=AuthorExt(id=1241719234250732360, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, authorId=1241719234162651974, language=EN, stringName=Zhilin WU, firstName=Zhilin, middleName=null, lastName=WU, prefix=null, suffix=null, authorComment=null, nameInitials=null, affiliation=null, department=null, xref=, address=null, bio=null, bioImg=null, bioContent=null, aboutCorrespAuthor=null), CN=AuthorExt(id=1241719234322035530, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, authorId=1241719234162651974, language=CN, stringName=吴志林, firstName=null, middleName=null, lastName=null, prefix=null, suffix=null, authorComment=null, nameInitials=null, affiliation=null, department=null, xref=, address=null, bio={"img":"WNRIF6oYa2u4v3WWqOvpLQ==","content":"

吴志林,研究员,博士研究生导师。中国计算机学会形式化方法专业委员会副秘书长。主要研究方向为计算逻辑、自动机理论、计算机软硬件系统的形式验证。先后承担国家重点研发计划、中国科学院A类战略性先导科技专项、中央军委装备发展部预研领域基金、国家自然科学基金等项目10余项。获CCF-IEEE CS青年科学家奖。发表论文40余篇。电子信箱:

"}, bioImg=WNRIF6oYa2u4v3WWqOvpLQ==, bioContent=

吴志林,研究员,博士研究生导师。中国计算机学会形式化方法专业委员会副秘书长。主要研究方向为计算逻辑、自动机理论、计算机软硬件系统的形式验证。先后承担国家重点研发计划、中国科学院A类战略性先导科技专项、中央军委装备发展部预研领域基金、国家自然科学基金等项目10余项。获CCF-IEEE CS青年科学家奖。发表论文40余篇。电子信箱:

, aboutCorrespAuthor=null)}, companyList=null)], keywords=[Keyword(id=1241719234410115916, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=1, keyword=circuit design), Keyword(id=1241719234481419086, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=2, keyword=correctness and safety), Keyword(id=1241719234565305168, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=3, keyword=electronic design automation), Keyword(id=1241719234628219730, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=4, keyword=equivalence checking), Keyword(id=1241719234699522900, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=5, keyword=assertion-based formal verification), Keyword(id=1241719234770826070, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=6, keyword=satisfiability problem (SAT) solving), Keyword(id=1241719234858906455, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=EN, orderNo=7, keyword=model checking), Keyword(id=1241719234917626712, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=1, keyword=芯片设计), Keyword(id=1241719234976346970, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=2, keyword=正确性与安全性), Keyword(id=1241719235043455836, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=3, keyword=电子设计自动化), Keyword(id=1241719235114759006, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=4, keyword=等价性验证), Keyword(id=1241719235198645088, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=5, keyword=基于断言的形式验证), Keyword(id=1241719235265753954, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=6, keyword=命题逻辑可满足性(SAT)求解), Keyword(id=1241719235328668516, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, language=CN, orderNo=7, keyword=模型检测)], refs=[Reference(id=1241719235517412201, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, doi=null, pmid=null, pmcid=null, year=1986, volume=35, issue=8, pageStart=677, pageEnd=691, url=null, language=null, rfNumber=[1], rfOrder=0, authorNames=Bryant R E, journalName=IEEE Transaction on Computers, refType=null, unstructuredReference=Bryant R E. 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Rather than following the traditional approach of choosing the best solver for a given class of instances, we advocate making this decision online on a per-instance basis. Building on previous work, we describe SATzilla, an automated approach for constructing per-instance algorithm portfolios for SAT that use so-called empirical hardness models to choose among their constituent solvers. This approach takes as input a distribution of problem instances and a set of component solvers, and constructs a portfolio optimizing a given objective function (such as mean runtime, percent of instances solved, or score in a competition). The excellent performance of SATzilla was independently verified in the 2007 SAT Competition, where our SATzilla07 solvers won three gold, one silver and one bronze medal. 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Piscataway: IEEE Press, 2016: 393-405., articleTitle=Cambricon: An instruction set architecture for neural networks, refAbstract=null)], funds=[Fund(id=1241719235433526119, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, awardId=2021ZD0113300, language=CN, fundingSource=国家重点研发计划(2021ZD0113300), fundOrder=null, country=null)], companyList=[AuthorCompany(id=1241719233873244988, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, xref=null, ext=[AuthorCompanyExt(id=1241719233881633597, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, companyId=1241719233873244988, language=EN, country=null, province=null, city=null, postcode=null, companyName=null, departmentName=null, remark=State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China), AuthorCompanyExt(id=1241719233894216510, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241719222749942559, companyId=1241719233873244988, language=CN, country=null, province=null, city=null, postcode=null, companyName=null, departmentName=null, remark=中国科学院软件研究所计算机科学国家重点实验室,北京 100190)])], figs=null, attaches=null, journal=Journal(id=1129340393107079197, delFlag=0, nameCn=前瞻科技, nameEn=Science and Technology Foresight, nameHistory1=null, nameHistory2=null, issn=2097-0781, eissn=, cn=10-1786/N, coden=null, periodic=2, language=CN, oaType=null, ccby=null, superviseOffice=null, ownerOffice=null, pubOffice=null, editorOffice=null, officeType=null, aims=null, clcCode=null, officeProv=null, officeCity=null, officeAddr=null, officeZip=null, officeEmail=null, officePhone=null, editDirector=null, officeDirector=null, officeDirectorPhone=null, officeStaffNum=null, officeEmpNum=null, coverPicUrl=ti95jJIJzXaf02YNe1UF2A==, journalPrice=null, startedYear=null, abbrevIsoEn=Sci Technol Fore, journalRemark=null, publicationField=null, createdTime=null, updatedTime=1757931223825, createdBy=null, updatedBy=15831073675, firstLetterCn=S, firstLetterEn=S, subjectCode=Natural Sciences, subjectName=自然科学, subjectCodeEn=Natural Sciences, subjectNameEn=null, picCn=ti95jJIJzXaf02YNe1UF2A==, picEn=cuGsq8KPhoqtfsQROuZvoQ==, jcr=null, cjcr=null, exts=[JournalExt(id=1174411930946125939, language=CN, name=前瞻科技, nameHistory1=null, nameHistory2=null, managedBy=, sponsoredBy=, publishedBy=, editorOffice=, officeProv=null, officeCity=null, officeAddr=, officeZip=, editDirector=null, officeDirector=null, officePhone=null, coverPicUrl=null, journalRemark=, submitArticleUrl=null, websiteUrl=http://www.qianzhankeji.cn/CN/2097-0781/home.shtml, createdTime=1757931223856, updatedTime=1757931223856, createdBy=15831073675, updatedBy=15831073675, submissionGuidelinesUrl=http://www.qianzhankeji.cn/CN/column/column7.shtml, submissionAuthorUrl=https://qzkjauthor.cast.org.cn/webm/, submissionEditorUrl=https://qzkjeditor.cast.org.cn/webm/, submissionReviewUrl=https://qzkjauthor.cast.org.cn/webm/, submissionCeEditorUrl=https://qzkjeditor.cast.org.cn/webm/, submissionAeEditorUrl=https://qzkjeditor.cast.org.cn/webm/, option={"copyright":""}), JournalExt(id=1174411931076149364, language=EN, name=Science and Technology Foresight, nameHistory1=null, nameHistory2=null, managedBy=, sponsoredBy=, publishedBy=, editorOffice=, officeProv=null, officeCity=null, officeAddr=, officeZip=, editDirector=null, officeDirector=null, officePhone=null, coverPicUrl=null, journalRemark=, submitArticleUrl=null, websiteUrl=http://www.qianzhankeji.cn/EN/2097-0781/home.shtml, createdTime=1757931223887, updatedTime=1757931223887, createdBy=15831073675, updatedBy=15831073675, submissionGuidelinesUrl=http://www.qianzhankeji.cn/EN/column/column7.shtml, submissionAuthorUrl=https://qzkjauthor.manuscriptcloud.com/login, submissionEditorUrl=https://qzkjeditor.manuscriptcloud.com/login, submissionReviewUrl=https://qzkjauthor.manuscriptcloud.com/login, submissionCeEditorUrl=https://qzkjeditor.manuscriptcloud.com/login, submissionAeEditorUrl=https://qzkjeditor.manuscriptcloud.com/login, option={"copyright":""})], databaseList=null, tenantJournalId=1146032081894723586, websiteList=[Website(id=1148243202353652128, webName=null, webTitle=null, webDomain=null, webCopyrigh=null, webIpcNo=null, seoTitle=null, seoKeywords=null, seoDescription=null, tenantJournalId=null, journalId=1146032081894723586, journalNameCn=null, journalNameEn=null, grayFlag=null, tenantId=1146029695717560320, platformId=null, journalGroupId=null, journalGroupNameCn=null, journalGroupNameEn=null, type=1, domain=https://castjournals.cast.org.cn/joweb/qzkj/CN, language=CN, createTime=1751692112768, createBy=18614031015, updateTime=1753516254852, updateBy=18614031015, name=《前瞻科技》中文站点, tplId=1146099689490845704, title=前瞻科技, delFlag=0, indexPage=/home, props=[WebsiteProps(id=1148618977242275853, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1148243202353652128, code=articleTextType, value=kx, createTime=1751781704483, updateTime=1751781704483, creator=18614031015, updator=18614031015), WebsiteProps(id=1148618977217110026, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1148243202353652128, code=banner, value=null, createTime=1751781704477, updateTime=1751781704477, creator=18614031015, updator=18614031015), WebsiteProps(id=1148618977204527113, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1148243202353652128, code=logo, value=https://castjournals.cast.org.cn/joweb/kjdb/CN/file/pic?fileId=skpCN5mVIzgEJbdUXu8/8A==, createTime=1751781704474, updateTime=1751781704474, creator=18614031015, updator=18614031015), WebsiteProps(id=1148618977233887244, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1148243202353652128, code=picServerUrl, value=https://castjournals.cast.org.cn/joweb/kjdb/CN/file/pic, createTime=1751781704481, updateTime=1751781704481, creator=18614031015, updator=18614031015), WebsiteProps(id=1148618977225498635, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1148243202353652128, code=staticResourcePath, value=https://castjournals.cast.org.cn/joweb/cast_kjdb_cn_619/, createTime=1751781704479, updateTime=1751781704479, creator=18614031015, updator=18614031015)]), Website(id=1155894377965830154, webName=null, webTitle=null, webDomain=null, webCopyrigh=null, webIpcNo=null, seoTitle=null, seoKeywords=null, seoDescription=null, tenantJournalId=null, journalId=1146032081894723586, journalNameCn=null, journalNameEn=null, grayFlag=null, tenantId=1146029695717560320, platformId=null, journalGroupId=null, journalGroupNameCn=null, journalGroupNameEn=null, type=1, domain=https://castjournals.cast.org.cn/joweb/qzkj/EN, language=EN, createTime=1753516295187, createBy=18614031015, updateTime=1753516295187, updateBy=18614031015, name=《前瞻科技》英文站点, tplId=1146101810881728533, title=Science and Technology Foresight, delFlag=0, indexPage=/home, props=[WebsiteProps(id=1155894740970233959, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1155894377965830154, code=articleTextType, value=kx, createTime=1753516381733, updateTime=1753516381733, creator=18614031015, updator=18614031015), WebsiteProps(id=1155894740953456740, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1155894377965830154, code=banner, value=null, createTime=1753516381729, updateTime=1753516381729, creator=18614031015, updator=18614031015), WebsiteProps(id=1155894740945068131, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1155894377965830154, code=logo, value=https://castjournals.cast.org.cn/joweb/kjdb/CN/file/pic?fileId=skpCN5mVIzgEJbdUXu8/8A==, createTime=1753516381727, updateTime=1753516381727, creator=18614031015, updator=18614031015), WebsiteProps(id=1155894740966039654, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1155894377965830154, code=picServerUrl, value=https://castjournals.cast.org.cn/joweb/kjdb/CN/file/pic, createTime=1753516381732, updateTime=1753516381732, creator=18614031015, updator=18614031015), WebsiteProps(id=1155894740961845349, tenantId=1146029695717560320, journalId=null, journalGroupId=null, siteId=1155894377965830154, code=staticResourcePath, value=https://castjournals.cast.org.cn/joweb/cast_kjdb_cn_619/, createTime=1753516381731, updateTime=1753516381731, creator=18614031015, updator=18614031015)])], journalTitle=前瞻科技, weixinUrl=null, journalUrl=null, iacademicId=null, status=0, seqNo=null, journalTitleEn=Science and Technology Foresight, journalPhotoCn=ti95jJIJzXaf02YNe1UF2A==, journalPhotoEn=cuGsq8KPhoqtfsQROuZvoQ==, journalFirstLetter=S, journalRecommend=null, journalNew=null, journalCollection=null, jcrJf=null, cjcrJf=null, jcrJfStr=null, cjcrJfStr=null, submissionFirstDecision=null, sciSubjectClassification=null, casSubjectClassification=null, citeScore=null, totalCitationFrequency=null, icpCode=null, psCode=null, advertisingLicenseCode=null, copyrightInformation=null, country=null, option=, provinceCode=null, provinceName=null, collectFlag=false), detailUrlCn=https://castjournals.cast.org.cn/joweb/qzkj/CN/10.3981/j.issn.2097-0781.2023.01.002, detailUrlEn=https://castjournals.cast.org.cn/joweb/qzkj/EN/10.3981/j.issn.2097-0781.2023.01.002, pdfUrlCn=https://castjournals.cast.org.cn/joweb/qzkj/CN/PDF/10.3981/j.issn.2097-0781.2023.01.002, pdfUrlEn=https://castjournals.cast.org.cn/joweb/qzkj/EN/PDF/10.3981/j.issn.2097-0781.2023.01.002, aliStartDate=null, aliEndDate=null, collectionFlag=false, citedCount=null, citedUrl=null, reference=null)
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Formal Verification of Circuit Design
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Bohua ZHAN , Zhilin WU
Science and Technology Foresight | Review and Commentary 2023,2(1): 23-32
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Science and Technology Foresight | Review and Commentary 2023, 2(1): 23-32
Formal Verification of Circuit Design
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Bohua ZHAN , Zhilin WU
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  • State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China

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Formal Verification of Circuit Design
Bohua ZHAN , Zhilin WU
Affiliations
  • State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China
Published: 2023-03-20 doi: 10.3981/j.issn.2097-0781.2023.01.002
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The verification of circuit design is to check its correctness and safety, which is vital in the circuit design process and occupies almost half of the cost and time. Formal verification is one of the important ways to guarantee the correctness and safety of software and hardware systems of computers and has been applied to circuit design verification. The electronic design automation (EDA) software from three global EDA giants, i.e., Cadence, Synopsis, and Siemens, all includes mature formal verification tools for circuit design. This paper summarizes the current status of the formal verification of circuit design, analyzes its challenges, discusses its perspectives and trends, and proposes suggestions on its development in China.

circuit design  /  correctness and safety  /  electronic design automation  /  equivalence checking  /  assertion-based formal verification  /  satisfiability problem (SAT) solving  /  model checking

The verification of circuit design is to check its correctness and safety, which is vital in the circuit design process and occupies almost half of the cost and time. Formal verification is one of the important ways to guarantee the correctness and safety of software and hardware systems of computers and has been applied to circuit design verification. The electronic design automation (EDA) software from three global EDA giants, i.e., Cadence, Synopsis, and Siemens, all includes mature formal verification tools for circuit design. This paper summarizes the current status of the formal verification of circuit design, analyzes its challenges, discusses its perspectives and trends, and proposes suggestions on its development in China.

circuit design  /  correctness and safety  /  electronic design automation  /  equivalence checking  /  assertion-based formal verification  /  satisfiability problem (SAT) solving  /  model checking
詹博华, 吴志林. 芯片设计形式验证[J]. 前瞻科技, 2023 , 2 (1) : 5 -143 . DOI: 10.3981/j.issn.2097-0781.2023.01.002
Bohua ZHAN, Zhilin WU. Formal Verification of Circuit Design[J]. Science and Technology Foresight, 2023 , 2 (1) : 5 -143 . DOI: 10.3981/j.issn.2097-0781.2023.01.002
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doi: 10.3981/j.issn.2097-0781.2023.01.002
  • Received:2022-12-31
  • Published:2023-03-20
  • Release:2023-03-24
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  • 收稿日期:2022-12-31
  • 修回日期:2023-01-30
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国家重点研发计划(2021ZD0113300)
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    State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China

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詹博华, 吴志林. 芯片设计形式验证[J]. 前瞻科技, 2023 , 2 (1) : 5 -143 . DOI: 10.3981/j.issn.2097-0781.2023.01.002
Bohua ZHAN, Zhilin WU. Formal Verification of Circuit Design[J]. Science and Technology Foresight, 2023 , 2 (1) : 5 -143 . DOI: 10.3981/j.issn.2097-0781.2023.01.002
表12种不同金属材料的力学参数

Family
属数
Number of
genus
种数
Number of
species
占总种数比例
Percentage of
total species (%)

Genus
种数
Number of
species
占总种数比例
Percentage of total
species (%)
鹅膏菌科Amanitaceae 2 11 5.26 鹅膏菌属 Amanita 10 4.78
小菇科 Mycenaceae 2 12 5.74 丝盖伞属 Inocybe 5 2.39
多孔菌科 Polyporaceae 8 14 6.70 蜡蘑属 Laccaria 5 2.39
红菇科 Russulaceae 3 23 11.00 小皮伞属 Marasmius 6 2.87
小菇属 Mycena 11 5.26
光柄菇属 Pluteus 5 2.39
红菇属 Russula 17 8.13
栓菌属 Trametes 5 2.39
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