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Logic and memory technologies of integrated circuits (ICs) cannot be updated simply by plane scaling in the post-Moore era, and three dimensions (or 3D) have become a promising development direction. This paper discussed the development of technologies that have attracted wide attention from industries in the post-Moore era and are highly compatible with the existing IC industrial technologies and ecology in terms of logic, memory, and 3D integration. Furthermore, the paper analyzed the advantages and challenges of various technologies and tried to give suggestions on China’s research and development in this regard. In addition, in terms of logic technology, the paper started from the device development to expound on the current mainstream FinFET in mass production and gate-all-around nanodevices to be mass-produced and then introduced Forksheet and CFET devices. In terms of memory technology, the paper analyzed several memory devices, which include six different memorizers that are or are to be mass-produced. Finally, in terms of 3D integration, the paper described three popular technologies including 3D stacking, Chiplet, and large chips.

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集成电路逻辑技术和存储技术在后摩尔时代已无法单纯依靠平面尺寸微缩来实现更新迭代,立体化(或三维化)已成为重要的发展方向。文章主要从逻辑、存储、三维集成3方面探讨了后摩尔时代产业界关注较多且与当前集成电路产业技术和生态兼容性较高的技术发展趋势,分析了各类技术的优点及挑战,并尝试给出中国研究发展的建议。逻辑技术以器件发展为主线,对从目前量产的主流鳍式场效应晶体管(FinFET)到即将进入量产的围栅纳米器件进行探讨,继而展望了堆叠叉片(Forksheet)晶体管和互补场效应晶体管(CFET)两种器件;存储技术以不同类型的存储器件为主线,覆盖了量产中及即将进入量产的6类存储器;三维集成讨论了三维堆叠、芯粒(Chiplet)、大芯片3种目前较受关注的技术。

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卜伟海,教授级高级工程师。现任北方集成电路技术创新中心副总经理、技术开发与合作负责人。主要研究方向为先进逻辑器件与工艺、嵌入式新型存储技术等。曾作为国内领先集成电路企业的先导技术研发团队骨干和负责人完成多个节点工艺技术预研,主持和参与国家“863”计划、国家重点研发计划、国家科技重大专项02专项等多个重大项目。入选北京市优秀人才培养资助计划、北京经济技术开发区“亦麒麟”杰出人才。合作撰写专著2部,发表论文20余篇,获授权发明专利52项。电子信箱:

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卜伟海,教授级高级工程师。现任北方集成电路技术创新中心副总经理、技术开发与合作负责人。主要研究方向为先进逻辑器件与工艺、嵌入式新型存储技术等。曾作为国内领先集成电路企业的先导技术研发团队骨干和负责人完成多个节点工艺技术预研,主持和参与国家“863”计划、国家重点研发计划、国家科技重大专项02专项等多个重大项目。入选北京市优秀人才培养资助计划、北京经济技术开发区“亦麒麟”杰出人才。合作撰写专著2部,发表论文20余篇,获授权发明专利52项。电子信箱:

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卜伟海,教授级高级工程师。现任北方集成电路技术创新中心副总经理、技术开发与合作负责人。主要研究方向为先进逻辑器件与工艺、嵌入式新型存储技术等。曾作为国内领先集成电路企业的先导技术研发团队骨干和负责人完成多个节点工艺技术预研,主持和参与国家“863”计划、国家重点研发计划、国家科技重大专项02专项等多个重大项目。入选北京市优秀人才培养资助计划、北京经济技术开发区“亦麒麟”杰出人才。合作撰写专著2部,发表论文20余篇,获授权发明专利52项。电子信箱:

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International roadmap for devices and systems more moore (2021 update)[EB/OL]. [2022-07-17]. https://irds.ieee.org/editions/2021/more-moore., articleTitle=International roadmap for devices and systems more moore (2021 update), refAbstract=null), Reference(id=1241718748420305295, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2018, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[3], rfOrder=2, authorNames=卜伟海, journalName=王阳元. 集成电路产业全书(中册), refType=null, unstructuredReference=卜伟海. 鳍式场效应晶体管[M]// 王阳元. 集成电路产业全书(中册). 北京: 电子工业出版社, 2018., articleTitle=鳍式场效应晶体管, refAbstract=null), Reference(id=1241718748483219856, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=SC1, pageEnd=1, url=null, language=null, rfNumber=[4], rfOrder=3, authorNames=Cai J, journalName=2021 Symposia on VLSI Technology and Circuits, refType=null, unstructuredReference=Cai J. CMOS device technology for the next decade[R]. 2021 Symposia on VLSI Technology and Circuits, 2021: SC1-1., articleTitle=CMOS device technology for the next decade, refAbstract=null), Reference(id=1241718748546134417, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=3, issue=1, pageStart=14, pageEnd=26, url=null, language=null, rfNumber=[5], rfOrder=4, authorNames=武咏琴, 卜伟海, 康劲, journalName=微纳电子与智能制造, refType=null, unstructuredReference=武咏琴, 卜伟海, 康劲, 等. 3 nm以下技术代FinFET及围栅器件的发展与挑战[J]. 微纳电子与智能制造, 2021, 3(1): 14-26., articleTitle=3 nm以下技术代FinFET及围栅器件的发展与挑战, refAbstract=null), Reference(id=1241718748630020498, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/DRC.2017.7999495, pmid=null, pmcid=null, year=2017, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[6], rfOrder=5, authorNames=Razavieh A, Zeitzoff P, Brown D E, journalName=2017 75th Annual Device Research Conference, refType=null, unstructuredReference=Razavieh A, Zeitzoff P, Brown D E, et al. Scaling challenges of FinFET architecture below 40 nm contacted gate pitch[C]// 2017 75th Annual Device Research Conference. Piscataway: IEEE Press, 2017, doi: 10.1109/DRC.2017.7999495., articleTitle=Scaling challenges of FinFET architecture below 40 nm contacted gate pitch, refAbstract=null), Reference(id=1241718748705517971, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2020, volume=67, issue=12, pageStart=5355, pageEnd=5361, url=null, language=null, rfNumber=[7], rfOrder=6, authorNames=Cheng K, Parck C, Wu H, journalName=IEEE Transaction on Election Devices, refType=null, unstructuredReference=Cheng K, Parck C, Wu H, et al. Improved air spacer for highly scaled CMOS technology[J]. IEEE Transaction on Election Devices, 2020, 67(12): 5355-5361., articleTitle=Improved air spacer for highly scaled CMOS technology, refAbstract=null), Reference(id=1241718748789404052, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM19573.2019.8993577, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[8], rfOrder=7, authorNames=Yeap G, Lin S S, Chen Y M, journalName=2019 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Yeap G, Lin S S, Chen Y M, et al. 5 nm CMOS production technology platform featuring full-fledged EUV, and high mobility channel FinFETs with densest 0.021 µm2 SRAM cells for mobile SoC and high performance computing applications[C]// 2019 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2020, doi: 10.1109/IEDM19573.2019.8993577., articleTitle=5 nm CMOS production technology platform featuring full-fledged EUV, and high mobility channel FinFETs with densest 0.021 µm2 SRAM cells for mobile SoC and high performance computing applications, refAbstract=null), Reference(id=1241718748948787605, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=null, pageEnd=null, url=https://www.tsmc.com/japanese/dedicatedFoundry/technology/logic/l_3nm, language=null, rfNumber=[9], rfOrder=8, authorNames=null, journalName=null, refType=null, unstructuredReference=3 nm technology[EB/OL]. [2022-07-09]. https://www.tsmc.com/japanese/dedicatedFoundry/technology/logic/l_3nm., articleTitle=3 nm technology, refAbstract=null), Reference(id=1241718749003313558, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=SC1, pageEnd=2, url=null, language=null, rfNumber=[10], rfOrder=9, authorNames=Horiguchi N, journalName=null, refType=null, unstructuredReference=Horiguchi N. Nanosheet device architectures to enable CMOS scaling in 3 nm and beyond: Nanosheet, Forksheet and CFET: The short course of 2021 Symposia on VLSI Technology and Circuits[R]. 2021: SC1-2., articleTitle=Nanosheet device architectures to enable CMOS scaling in 3 nm and beyond: Nanosheet, Forksheet and CFET: The short course of 2021 Symposia on VLSI Technology and Circuits, refAbstract=null), Reference(id=1241718749062033815, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=null, pageEnd=null, url=https://www.techinsights.com/blog/disruptive-technology-7nm-smic-minerva-bitcoin-miner, language=null, rfNumber=[11], rfOrder=10, authorNames=null, journalName=null, refType=null, unstructuredReference=SMIC 7 nm technology found in MinerVa bitcoin miner[EB/OL]. [2022-09-01]. https://www.techinsights.com/blog/disruptive-technology-7nm-smic-minerva-bitcoin-miner., articleTitle=SMIC 7 nm technology found in MinerVa bitcoin miner, refAbstract=null), Reference(id=1241718749133336984, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=SC1, pageEnd=4, url=null, language=null, rfNumber=[12], rfOrder=11, authorNames=Lin C H, journalName=null, refType=null, unstructuredReference=Lin C H. Beyond FinFET devices: GAA, CFET, and 2D material FET: The short course of 2021 International Electron Devices Meeting[R]. 2021: SC1-4., articleTitle=Beyond FinFET devices: GAA, CFET, and 2D material FET: The short course of 2021 International Electron Devices Meeting, refAbstract=null), Reference(id=1241718749196251545, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/VLSITechnology18217.2020.9265025, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[13], rfOrder=12, authorNames=Barraud S, Previtali B, Vizioz C, journalName=2020 IEEE Symposium on VLSI Technology, refType=null, unstructuredReference=Barraud S, Previtali B, Vizioz C, et al. 7-levels-stacked nanosheet GAA transistors for high performance computing[C]// 2020 IEEE Symposium on VLSI Technology. Piscataway: IEEE Press, 2020, doi: 10.1109/VLSITechnology18217.2020.9265025., articleTitle=7-levels-stacked nanosheet GAA transistors for high performance computing, refAbstract=null), Reference(id=1241718749263360410, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2018, volume=null, issue=null, pageStart=143, pageEnd=144, url=null, language=null, rfNumber=[14], rfOrder=13, authorNames=Bardon M Garcia, Sherazi Y, Jang D, journalName=2018 IEEE Symposium on VLSI Technology, refType=null, unstructuredReference=Bardon M Garcia, Sherazi Y, Jang D, et al. Power-performance trade-offs for lateral nanosheets on ultra-scaled standard cells[C]// 2018 IEEE Symposium on VLSI Technology. Piscataway: IEEE Press, 2018: 143-144., articleTitle=Power-performance trade-offs for lateral nanosheets on ultra-scaled standard cells, refAbstract=null), Reference(id=1241718749326274971, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/VLSITechnology18217.2020.9265010, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[15], rfOrder=14, authorNames=Bao R, Watanabe K, Zhang J, journalName=2020 IEEE Symposium on VLSI Technology, refType=null, unstructuredReference=Bao R, Watanabe K, Zhang J, et al. Selective enablement of dual dipoles for near bandedge multi-Vt solution in high performance FinFET and nanosheet technologies[C]// 2020 IEEE Symposium on VLSI Technology. Piscataway: IEEE Press, 2020, doi: 10.1109/VLSITechnology18217.2020.9265010., articleTitle=Selective enablement of dual dipoles for near bandedge multi-Vt solution in high performance FinFET and nanosheet technologies, refAbstract=null), Reference(id=1241718749380800924, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM19573.2019.8993490, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[16], rfOrder=15, authorNames=Zhang J, Frougier J, Greene A, journalName=2019 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Zhang J, Frougier J, Greene A, et al. Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications[C]// 2019 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2020, doi: 10.1109/IEDM19573.2019.8993490., articleTitle=Full bottom dielectric isolation to enable stacked nanosheet transistor for low power and high performance applications, refAbstract=null), Reference(id=1241718749443715485, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM13553.2020.9372041, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[17], rfOrder=16, authorNames=Mochizuki S, Bhuiyan M, Zhou H, journalName=2020 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Mochizuki S, Bhuiyan M, Zhou H, et al. Stacked gate-all-around nanosheet pFET with highly compressive strained Si1-xGex channel[C]// 2020 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2021, doi: 10.1109/IEDM13553.2020.9372041., articleTitle=Stacked gate-all-around nanosheet pFET with highly compressive strained Si1-xGex channel, refAbstract=null), Reference(id=1241718749502435742, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM13553.2020.9371933, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[18], rfOrder=17, authorNames=Agrawal A, Chouksey S, Rachmady W, journalName=2020 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Agrawal A, Chouksey S, Rachmady W, et al. Gate-all-around strained Si0.4Ge0.6 nanosheet PMOS on strain relaxed buffer for high performance low power logic application[C]// 2020 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2021, doi: 10.1109/IEDM13553.2020.9371933., articleTitle=Gate-all-around strained Si0.4Ge0.6 nanosheet PMOS on strain relaxed buffer for high performance low power logic application, refAbstract=null), Reference(id=1241718749603099039, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2008, volume=null, issue=null, pageStart=895, pageEnd=898, url=null, language=null, rfNumber=[19], rfOrder=18, authorNames=Tian Y, Huang R, Wang Y, journalName=2007 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Tian Y, Huang R, Wang Y, et al. New self-aligned silicon nanowire transistors on bulk substrate fabricated by epi-free compatible CMOS technology: Process integration, experimental characterization of carrier transport and low frequency noise[C]// 2007 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2008: 895-898., articleTitle=New self-aligned silicon nanowire transistors on bulk substrate fabricated by epi-free compatible CMOS technology: Process integration, experimental characterization of carrier transport and low frequency noise, refAbstract=null), Reference(id=1241718749657624992, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM.2017.8268430, pmid=null, pmcid=null, year=2017, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[20], rfOrder=19, authorNames=Weckx P, Ryckaert J, Putcha V, journalName=2017 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Weckx P, Ryckaert J, Putcha V, et al. Stacked nanosheet fork architecture for SRAM design and device co-optimization toward 3 nm[C]// 2017 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2017, doi: 10.1109/IEDM.2017.8268430., articleTitle=Stacked nanosheet fork architecture for SRAM design and device co-optimization toward 3 nm, refAbstract=null), Reference(id=1241718749720539553, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM19573.2019.8993635, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[21], rfOrder=20, authorNames=Weckx P, Ryckaert J, Dentoni Litta E, journalName=2019 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Weckx P, Ryckaert J, Dentoni Litta E, et al. Novel forksheet device architecture as ultimate logic scaling device towards 2 nm[C]// 2019 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2020, doi: 10.1109/IEDM19573.2019.8993635., articleTitle=Novel forksheet device architecture as ultimate logic scaling device towards 2 nm, refAbstract=null), Reference(id=1241718749779259810, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[22], rfOrder=21, authorNames=Mertens H, Ritzenthaler R, Oniki Y, journalName=2021 Symposium on VLSI Technology, refType=null, unstructuredReference=Mertens H, Ritzenthaler R, Oniki Y, et al. Forksheet FETs for advanced CMOS scaling:Forksheet-nanosheet co-integration and dual work function metal gates at 17 nm N-P space[C]// 2021 Symposium on VLSI Technology. Piscataway: IEEE Press, 2021., articleTitle=Forksheet FETs for advanced CMOS scaling:Forksheet-nanosheet co-integration and dual work function metal gates at 17 nm N-P space, refAbstract=null), Reference(id=1241718749846368675, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2018, volume=null, issue=null, pageStart=141, pageEnd=142, url=null, language=null, rfNumber=[23], rfOrder=22, authorNames=Ryckaert J, Schuddinck P, Weckx P, journalName=2018 IEEE Symposium on VLSI Technology, refType=null, unstructuredReference=Ryckaert J, Schuddinck P, Weckx P, et al. The complementary FET (CFET) for CMOS scaling beyond N3[C]// 2018 IEEE Symposium on VLSI Technology. Piscataway: IEEE Press, 2018: 141-142., articleTitle=The complementary FET (CFET) for CMOS scaling beyond N3, refAbstract=null), Reference(id=1241718749913477540, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2004, volume=null, issue=null, pageStart=null, pageEnd=07, url=null, language=null, rfNumber=[24], rfOrder=23, authorNames=张盛东, 陈文新, 吴旭升, journalName=null, refType=null, unstructuredReference=张盛东, 陈文新, 吴旭升, 等. 一种位于SOI衬底上的CMOS电路结构及其制作方法: 中国, 200410009317.8[P]. 2004-07-09., articleTitle=一种位于SOI衬底上的CMOS电路结构及其制作方法: 中国, 200410009317.8, refAbstract=null), Reference(id=1241718749980586405, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/TED.2005.854267, pmid=null, pmcid=null, year=2005, volume=52, issue=9, pageStart=1998, pageEnd=2003, url=http://ieeexplore.ieee.org/document/1499087/, language=null, rfNumber=[25], rfOrder=24, authorNames=Wu X, Chan P C H, Zhang S, journalName=IEEE Transactions on Electron Devices, refType=null, unstructuredReference=Wu X, Chan P C H, Zhang S, et al. A three-dimensional stacked fin-CMOS technology for high-density ULSI circuits[J]. IEEE Transactions on Electron Devices, 2005, 52(9): 1998-2003., articleTitle=A three-dimensional stacked fin-CMOS technology for high-density ULSI circuits, refAbstract=null), Reference(id=1241718750068666790, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/VLSITechnology18217.2020.9265073, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[26], rfOrder=25, authorNames=Subramanian S, Hosseini M, Chiarella T, journalName=2020 IEEE Symposium on VLSI Technology, refType=null, unstructuredReference=Subramanian S, Hosseini M, Chiarella T, et al. First monolithic integration of 3D complementary FET (CFET) on 300 mm wafers[C]// 2020 IEEE Symposium on VLSI Technology. Piscataway: IEEE Press, 2020, doi: 10.1109/VLSITechnology18217.2020.9265073., articleTitle=First monolithic integration of 3D complementary FET (CFET) on 300 mm wafers, refAbstract=null), Reference(id=1241718750148358567, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=null, pageEnd=null, url=https://doi.org/10.1117/12.2583395, language=null, rfNumber=[27], rfOrder=26, authorNames=Chehab B, Ryckaert J, Schuddinck P, journalName=null, refType=null, unstructuredReference=Chehab B, Ryckaert J, Schuddinck P, et al. Design-technology co-optimization of sequential and monolithic CFET as enabler of technology node beyond 2 nm[C/OL]. Proceedings Volume 11614, Design-Process-Technology Co-optimization XV, 116140D (2021). [2021-04-22] https://doi.org/10.1117/12.2583395., articleTitle=Design-technology co-optimization of sequential and monolithic CFET as enabler of technology node beyond 2 nm, refAbstract=null), Reference(id=1241718750215467432, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM13553.2020.9372066, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[28], rfOrder=27, authorNames=Huang C Y, Dewey G, Mannebach E, journalName=2020 International Electron Devices Meeting, refType=null, unstructuredReference=Huang C Y, Dewey G, Mannebach E, et al. 3-D self-aligned stacked NMOS-on-PMOS nanoribbon transistors for continued Moore,s law scaling[C]// 2020 International Electron Devices Meeting. Piscataway: IEEE Press, 2021, doi: 10.1109/IEDM13553.2020.9372066., articleTitle=3-D self-aligned stacked NMOS-on-PMOS nanoribbon transistors for continued Moore,s law scaling, refAbstract=null), Reference(id=1241718750274187689, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=193, pageEnd=196, url=null, language=null, rfNumber=[29], rfOrder=28, authorNames=Cho Y, Hwang Y, Kim H, journalName=null, refType=null, unstructuredReference=Cho Y, Hwang Y, Kim H, et al. Novel deep trench buried-body-contact (DBBC) of 4 F2 cell for sub 30 nm DRAM technology[C]// 2012 Proceedings of the European Solid-State Device Research Conference (ESSDERC). Piscataway:IEEE Press, 2012: 193-196., articleTitle=Novel deep trench buried-body-contact (DBBC) of 4 F2 cell for sub 30 nm DRAM technology, refAbstract=null), Reference(id=1241718750341296554, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2011, volume=null, issue=null, pageStart=211, pageEnd=214, url=null, language=null, rfNumber=[30], rfOrder=29, authorNames=Chung H, Kim H, Kim H, journalName=2011 Proceedings of the European Solid-State Device Research Conference, refType=null, unstructuredReference=Chung H, Kim H, Kim H, et al. Novel 4 F2 DRAM cell with vertical pillar transistor (VPT)[C]// 2011 Proceedings of the European Solid-State Device Research Conference. Piscataway: IEEE Press, 2011: 211-214., articleTitle=Novel 4 F2 DRAM cell with vertical pillar transistor (VPT), refAbstract=null), Reference(id=1241718750412599723, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=9, pageEnd=null, url=null, language=null, rfNumber=[31], rfOrder=30, authorNames=Hoefflinger B, journalName=NANO-CHIPS 2030, refType=null, unstructuredReference=Hoefflinger B. IRDS—International roadmap for devices and systems, rebooting computing, S3S[M]// NANO-CHIPS 2030. Cham: Springer Cham, 2020: 9-17., articleTitle=IRDS—International roadmap for devices and systems, rebooting computing, S3S, refAbstract=null), Reference(id=1241718751972880812, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM13553.2020.9372011, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[32], rfOrder=31, authorNames=Chang S C, Haratipour N, Shivaraman S, journalName=2020 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Chang S C, Haratipour N, Shivaraman S, et al. Anti-ferroelectric HfxZr1-xO2 capacitors for high-density 3-D embedded-DRAM[C]// 2020 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2021, doi: 10.1109/IEDM13553.2020.9372011., articleTitle=Anti-ferroelectric HfxZr1-xO2 capacitors for high-density 3-D embedded-DRAM, refAbstract=null), Reference(id=1241718752035795373, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IMW51353.2021.9439614, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[33], rfOrder=32, authorNames=Sakui K, Harada N, journalName=2021 IEEE International Memory Workshop (IMW), refType=null, unstructuredReference=Sakui K, Harada N. Dynamic flash memory with dual gate surrounding gate transistor (SGT)[C]// 2021 IEEE International Memory Workshop (IMW). Piscataway: IEEE Press, 2021, doi: 10.1109/IMW51353.2021.9439614., articleTitle=Dynamic flash memory with dual gate surrounding gate transistor (SGT), refAbstract=null), Reference(id=1241718752090321326, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/VLSITechnology-andcir46769.2022.9830271, pmid=null, pmcid=null, year=2022, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[34], rfOrder=33, authorNames=Huang K, Duan X, Feng J, journalName=2022 IEEE Symposium on VLSI Technology and Circuits, refType=null, unstructuredReference=Huang K, Duan X, Feng J, et al. Vertical channel-all-around (CAA) IGZO FET under 50 nm CD with high read current of 32.8 μA/μm (Vth 1V), well-performed thermal stability up to 120 ℃ for low latency, high-density 2T0C 3D DRAM application[C]// 2022 IEEE Symposium on VLSI Technology and Circuits. Piscata-way: IEEE Press, 2022, doi: 10.1109/VLSITechnology-andcir46769.2022.9830271., articleTitle=Vertical channel-all-around (CAA) IGZO FET under 50 nm CD with high read current of 32.8 μA/μm (Vth 1V), well-performed thermal stability up to 120 ℃ for low latency, high-density 2T0C 3D DRAM application, refAbstract=null), Reference(id=1241718752153235887, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/JSSC.2014.2352293, pmid=null, pmcid=null, year=2014, volume=50, issue=1, pageStart=204, pageEnd=213, url=https://ieeexplore.ieee.org/document/6899702, language=null, rfNumber=[35], rfOrder=34, authorNames=Park K T, Nam S, Kim D, journalName=IEEE Journal of Solid-State Circuits, refType=null, unstructuredReference=Park K T, Nam S, Kim D, et al. Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming[J]. IEEE Journal of Solid-State Circuits, 2014, 50(1): 204-213., articleTitle=Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming, refAbstract=null), Reference(id=1241718752224539056, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/JSSC.2015.2474117, pmid=null, pmcid=null, year=2015, volume=51, issue=1, pageStart=204, pageEnd=212, url=http://ieeexplore.ieee.org/document/7272752/, language=null, rfNumber=[36], rfOrder=35, authorNames=Jeong W, Im J, Kim D H, journalName=IEEE Journal of Solid-State Circuits, refType=null, unstructuredReference=Jeong W, Im J, Kim D H, et al. A 128 Gb 3 b/cell V-NAND flash memory with 1 Gb/s I/O rate[J]. IEEE Journal of Solid-State Circuits, 2015, 51(1): 204-212., articleTitle=A 128 Gb 3 b/cell V-NAND flash memory with 1 Gb/s I/O rate, refAbstract=null), Reference(id=1241718752283259313, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/JSSC.2016.2604297, pmid=null, pmcid=null, year=2016, volume=52, issue=1, pageStart=210, pageEnd=217, url=http://ieeexplore.ieee.org/document/7636938/, language=null, rfNumber=[37], rfOrder=36, authorNames=Kang D, Jeong W, Kim C, journalName=IEEE Journal of Solid-State Circuits, refType=null, unstructuredReference=Kang D, Jeong W, Kim C, et al. 256 Gb 3 b/cell V-NAND flash memory with 48 stacked WL layers[J]. IEEE Journal of Solid-State Circuits, 2016, 52(1): 210-217., articleTitle=256 Gb 3 b/cell V-NAND flash memory with 48 stacked WL layers, refAbstract=null), Reference(id=1241718752346173874, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/JSSC.2017.2731813, pmid=null, pmcid=null, year=2017, volume=53, issue=1, pageStart=124, pageEnd=133, url=https://ieeexplore.ieee.org/document/8010822/, language=null, rfNumber=[38], rfOrder=37, authorNames=Kim C, Kim D H, Jeong W, journalName=IEEE Journal of Solid-State Circuits, refType=null, unstructuredReference=Kim C, Kim D H, Jeong W, et al. A 512-Gb 3-b/cell 64-stacked WL 3-D-NAND flash memory[J]. IEEE Journal of Solid-State Circuits, 2017, 53(1): 124-133., articleTitle=A 512-Gb 3-b/cell 64-stacked WL 3-D-NAND flash memory, refAbstract=null), Reference(id=1241718752413282739, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=336, pageEnd=338, url=null, language=null, rfNumber=[39], rfOrder=38, authorNames=Maejima H, Kanda K, Fujimura S, journalName=null, refType=null, unstructuredReference=Maejima H, Kanda K, Fujimura S, et al. A 512 Gb 3 b/cell 3D flash memory on a 96-word-line-layer technology[C]// 2018 IEEE International Solid-State Circuits Conference (ISSCC). Piscataway:IEEE Press, 2018: 336-338., articleTitle=A 512 Gb 3 b/cell 3D flash memory on a 96-word-line-layer technology, refAbstract=null), Reference(id=1241718752472002996, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2019, volume=null, issue=null, pageStart=218, pageEnd=220, url=null, language=null, rfNumber=[40], rfOrder=39, authorNames=Siau C, Kim K H, Lee S, journalName=2019 IEEE International Solid-State Circuits Con-ference (ISSCC), refType=null, unstructuredReference=Siau C, Kim K H, Lee S, et al. 13.5 A 512 Gb 3-bit/cell 3D flash memory on 128-wordline-layer with 132 MB/s write performance featuring circuit-under-array technology[C]// 2019 IEEE International Solid-State Circuits Con-ference (ISSCC). Piscataway: IEEE Press, 2019, 218-220., articleTitle=13.5 A 512 Gb 3-bit/cell 3D flash memory on 128-wordline-layer with 132 MB/s write performance featuring circuit-under-array technology, refAbstract=null), Reference(id=1241718752534917557, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2021, volume=64, issue=null, pageStart=422, pageEnd=423, url=null, language=null, rfNumber=[41], rfOrder=40, authorNames=Park J W, Kim D, Ok S, journalName=2021 IEEE International Solid-State Circuits Conference (ISSCC), refType=null, unstructuredReference=Park J W, Kim D, Ok S, et al. 30.1 A 176-stacked 512 Gb 3 b/cell 3D-NAND flash with 10.8 Gb/mm2 density with a peripheral circuit under cell array architecture[C]// 2021 IEEE International Solid-State Circuits Conference (ISSCC). Piscataway: IEEE Press, 2021, 64: 422-423., articleTitle=30.1 A 176-stacked 512 Gb 3 b/cell 3D-NAND flash with 10.8 Gb/mm2 density with a peripheral circuit under cell array architecture, refAbstract=null), Reference(id=1241718752597832118, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=null, pageEnd=null, url=https://www.micron.com/products/nand-flash/176-layer-nand, language=null, rfNumber=[42], rfOrder=41, authorNames=Micron, journalName=null, refType=null, unstructuredReference=Micron. 176 layers of innovation[EB/OL].[2022-07-23]. https://www.micron.com/products/nand-flash/176-layer-nand., articleTitle=176 layers of innovation, refAbstract=null), Reference(id=1241718752652358071, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM.2015.7409618, pmid=null, pmcid=null, year=2015, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[43], rfOrder=42, authorNames=Parat K, Dennison C, journalName=2015 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Parat K, Dennison C. A floating gate based 3D NAND technology with CMOS under array[C]// 2015 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2015, doi: 10.1109/IEDM.2015.7409618., articleTitle=A floating gate based 3D NAND technology with CMOS under array, refAbstract=null), Reference(id=1241718752715272632, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM.2009.5424263, pmid=null, pmcid=null, year=2009, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[44], rfOrder=43, authorNames=Kau D C, Tang S, Karpov I V, journalName=2009 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Kau D C, Tang S, Karpov I V, et al. A stackable cross point phase change memory[C]// 2009 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2009, doi: 10.1109/IEDM.2009.5424263., articleTitle=A stackable cross point phase change memory, refAbstract=null), Reference(id=1241718752790770105, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1063/1.1707228, pmid=null, pmcid=null, year=2004, volume=84, issue=16, pageStart=3118, pageEnd=3120, url=http://aip.scitation.org/doi/10.1063/1.1707228, language=null, rfNumber=[45], rfOrder=44, authorNames=Huai Y, Albert F, Nguyen P, journalName=Applied Physics Letters, refType=null, unstructuredReference=Huai Y, Albert F, Nguyen P, et al. Observation of spin-transfer switching in deep submicron-sized and low-resistance magnetic tunnel junctions[J]. Applied Physics Letters, 2004, 84(16): 3118-3120., articleTitle=Observation of spin-transfer switching in deep submicron-sized and low-resistance magnetic tunnel junctions, refAbstract=null), Reference(id=1241718752866267578, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2007, volume=null, issue=null, pageStart=187, pageEnd=190, url=null, language=null, rfNumber=[46], rfOrder=45, authorNames=Klostermann U K, Angerbauer M, Gruning U, journalName=2007 IEEE International Electron Devices Meeting, refType=null, unstructuredReference=Klostermann U K, Angerbauer M, Gruning U, et al. A perpendicular spin torque switching based MRAM for the 28 nm technology node[C]// 2007 IEEE International Electron Devices Meeting. Piscataway: IEEE Press, 2007: 187-190., articleTitle=A perpendicular spin torque switching based MRAM for the 28 nm technology node, refAbstract=null), Reference(id=1241718752933376443, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1038/nature10309, pmid=null, pmcid=null, year=2011, volume=476, issue=7359, pageStart=189, pageEnd=193, url=https://doi.org/10.1038/nature10309, language=null, rfNumber=[47], rfOrder=46, authorNames=Miron I M, Garello K, Gaudin G, journalName=Nature, refType=null, unstructuredReference=Miron I M, Garello K, Gaudin G, et al. Perpendicular switching of a single ferromagnetic layer induced by in-plane current injection[J]. Nature, 2011, 476(7359): 189-193., articleTitle=Perpendicular switching of a single ferromagnetic layer induced by in-plane current injection, refAbstract=null), Reference(id=1241718753004679612, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2016, volume=null, issue=null, pageStart=557, pageEnd=565, url=null, language=null, rfNumber=[48], rfOrder=47, authorNames=Mahajan R, Sankman R, Patel N, journalName=null, refType=null, unstructuredReference=Mahajan R, Sankman R, Patel N, et al. Embedded multi-die interconnect bridge (EMIB)—A high density, high bandwidth packaging interconnect[C]// 2016 IEEE 66th Electronic Components and Technology Conference (ECTC). Piscataway:IEEE Press, 2016: 557-565., articleTitle=Embedded multi-die interconnect bridge (EMIB)—A high density, high bandwidth packaging interconnect, refAbstract=null), Reference(id=1241718753071788477, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2017, volume=34, issue=1, pageStart=16, pageEnd=25, url=null, language=null, rfNumber=[49], rfOrder=48, authorNames=Jun H, Nam S, Jin H, journalName=IEEE Design & Test, refType=null, unstructuredReference=Jun H, Nam S, Jin H, et al. High-bandwidth memory (HBM) test challenges and solutions[J]. IEEE Design & Test, 2017, 34(1): 16-25., articleTitle=High-bandwidth memory (HBM) test challenges and solutions, refAbstract=null), Reference(id=1241718753185034686, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM19574.2021.9720583, pmid=null, pmcid=null, year=2022, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[50], rfOrder=49, authorNames=Kim K, journalName=2021 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Kim K. The smallest engine transforming humanity: The past, present, and future[C]// 2021 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2022, doi: 10.1109/IEDM19574.2021.9720583., articleTitle=The smallest engine transforming humanity: The past, present, and future, refAbstract=null), Reference(id=1241718753247949247, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IMW.2017.7939084, pmid=null, pmcid=null, year=2017, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[51], rfOrder=50, authorNames=Jun H, Cho J, Lee K, journalName=2017 IEEE International Memory Workshop (IMW), refType=null, unstructuredReference=Jun H, Cho J, Lee K, et al. HBM (high bandwidth memory) DRAM technology and architecture[C]// 2017 IEEE International Memory Workshop (IMW). Piscataway: IEEE Press, 2017, doi: 10.1109/IMW.2017.7939084., articleTitle=HBM (high bandwidth memory) DRAM technology and architecture, refAbstract=null), Reference(id=1241718753310863808, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM19574.2021.9720682, pmid=null, pmcid=null, year=2021, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[52], rfOrder=51, authorNames=Duan X, Huang K, Feng J, journalName=2021 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Duan X, Huang K, Feng J, et al. Novel vertical channel-all-around (CAA) IGZO FETs for 2T0C DRAM with high density beyond 4 F2 by monolithic stacking[C]// 2021 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2021, doi: 10.1109/IEDM19574.2021.9720682., articleTitle=Novel vertical channel-all-around (CAA) IGZO FETs for 2T0C DRAM with high density beyond 4 F2 by monolithic stacking, refAbstract=null), Reference(id=1241718753369584065, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1126/science.aay0291, pmid=31439757, pmcid=null, year=2019, volume=366, issue=6462, pageStart=210, pageEnd=215, url=null, language=null, rfNumber=[53], rfOrder=52, authorNames=Ding K, Wang J, Zhou Y, journalName=Science, refType=null, unstructuredReference=Ding K, Wang J, Zhou Y, et al. Phase-change heterostructure enables ultralow noise and drift for memory operation[J]. Science, 2019, 366(6462): 210-215., articleTitle=Phase-change heterostructure enables ultralow noise and drift for memory operation, refAbstract=Artificial intelligence and other data-intensive applications have escalated the demand for data storage and processing. New computing devices, such as phase-change random access memory (PCRAM)-based neuro-inspired devices, are promising options for breaking the von Neumann barrier by unifying storage with computing in memory cells. However, current PCRAM devices have considerable noise and drift in electrical resistance that erodes the precision and consistency of these devices. We designed a phase-change heterostructure (PCH) that consists of alternately stacked phase-change and confinement nanolayers to suppress the noise and drift, allowing reliable iterative RESET and cumulative SET operations for high-performance neuro-inspired computing. Our PCH architecture is amenable to industrial production as an intrinsic materials solution, without complex manufacturing procedure or much increased fabrication cost.Copyright © 2019 The Authors, some rights reserved; exclusive licensee American Association for the Advancement of Science. No claim to original U.S. Government Works.), Reference(id=1241718753428304322, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IMW52921.2022.9779247, pmid=null, pmcid=null, year=2022, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[54], rfOrder=53, authorNames=Yoo S, Kim D, Koo Y M, journalName=2022 IEEE International Memory Workshop (IMW), refType=null, unstructuredReference=Yoo S, Kim D, Koo Y M, et al. Structural and device considerations for vertical cross point memory with single-stack memory toward CXL memory beyond 1x nm 3DXP[C]// 2022 IEEE International Memory Workshop (IMW). Piscataway: IEEE Press, 2022, doi: 10.1109/IMW52921.2022.9779247., articleTitle=Structural and device considerations for vertical cross point memory with single-stack memory toward CXL memory beyond 1x nm 3DXP, refAbstract=null), Reference(id=1241718753491218883, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IMW52921.2022.9779281, pmid=null, pmcid=null, year=2022, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[55], rfOrder=54, authorNames=Ali T, Olivo R, Kerdilès S, journalName=2022 IEEE International Memory Workshop (IMW), refType=null, unstructuredReference=Ali T, Olivo R, Kerdilès S, et al. Study of nanosecond laser annealing on silicon doped hafnium oxide film crystallization and capacitor reliability[C]// 2022 IEEE International Memory Workshop (IMW). Piscataway: IEEE Press, 2022, doi: 10.1109/IMW52921.2022.9779281., articleTitle=Study of nanosecond laser annealing on silicon doped hafnium oxide film crystallization and capacitor reliability, refAbstract=null), Reference(id=1241718753558327748, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.23919/VLSIT.2017.7998162, pmid=null, pmcid=null, year=2017, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[56], rfOrder=55, authorNames=Florent K, Lavizzari S, Di Piazza L, journalName=2017 Symposium on VLSI Technology, refType=null, unstructuredReference=Florent K, Lavizzari S, Di Piazza L, et al. First demonstration of vertically stacked ferroelectric Al doped HfO2 devices for NAND applications[C]// 2017 Symposium on VLSI Technology. Piscataway: IEEE Press, 2017, doi: 10.23919/VLSIT.2017.7998162., articleTitle=First demonstration of vertically stacked ferroelectric Al doped HfO2 devices for NAND applications, refAbstract=null), Reference(id=1241718753629630917, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=421, pageEnd=424, url=null, language=null, rfNumber=[57], rfOrder=56, authorNames=Yu S, Deng Y, Gao B, journalName=null, refType=null, unstructuredReference=Yu S, Deng Y, Gao B, et al. Design guidelines for 3D RRAM cross-point architecture[C]// 2014 IEEE International Symposium on Circuits and Systems (ISCAS). Piscataway:IEEE Press, 2014: 421-424., articleTitle=Design guidelines for 3D RRAM cross-point architecture, refAbstract=null), Reference(id=1241718753692545478, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/IEDM.2018.8614639, pmid=null, pmcid=null, year=2018, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[58], rfOrder=57, authorNames=Bocquet M, Hirztlin T, Klein J O, journalName=2018 IEEE International Electron Devices Meeting (IEDM), refType=null, unstructuredReference=Bocquet M, Hirztlin T, Klein J O, et al. In-memory and error-immune differential RRAM implementation of binarized deep neural networks[C]// 2018 IEEE International Electron Devices Meeting (IEDM). Piscataway: IEEE Press, 2018, doi: 10.1109/IEDM.2018.8614639., articleTitle=In-memory and error-immune differential RRAM implementation of binarized deep neural networks, refAbstract=null), Reference(id=1241718753751265735, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=288, pageEnd=289, url=null, language=null, rfNumber=[59], rfOrder=58, authorNames=Safranski C, Hu G, Sun J Z, journalName=null, refType=null, unstructuredReference=Safranski C, Hu G, Sun J Z, et al., Reliable sub-nano-second MRAM with double spin-torque magnetic tunnel junctions[C]//2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). Piscataway: IEEE Press, 2022: 288-289., articleTitle=Reliable sub-nano-second MRAM with double spin-torque magnetic tunnel junctions, refAbstract=null), Reference(id=1241718753822568904, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.23919/IWLPC52010.2020.9375855, pmid=null, pmcid=null, year=2020, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[60], rfOrder=59, authorNames=Min M, Kadivar S, journalName=2020 International Wafer Level Packaging Conference (IWLPC), refType=null, unstructuredReference=Min M, Kadivar S. Accelerating innovations in the new era of HPC, 5G and networking with advanced 3D packaging technologies[C]// 2020 International Wafer Level Packaging Conference (IWLPC). Piscataway: IEEE Pressg, 2020, doi: 10.23919/IWLPC52010.2020.9375855., articleTitle=Accelerating innovations in the new era of HPC, 5G and networking with advanced 3D packaging technologies, refAbstract=null), Reference(id=1241718753885483465, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1109/ISSCC42614.2022.9731694, pmid=null, pmcid=null, year=2022, volume=null, issue=null, pageStart=null, pageEnd=null, url=null, language=null, rfNumber=[61], rfOrder=60, authorNames=Niu D, Li S, Wang Y, journalName=2022 IEEE International Solid-State Circuits Conference (ISSCC), refType=null, unstructuredReference=Niu D, Li S, Wang Y, et al. 184 QPS/W 64 Mb/mm2 3D logic-to-DRAM hybrid bonding with process-near-memory engine for recommendation system[C]// 2022 IEEE International Solid-State Circuits Conference (ISSCC). Piscataway: IEEE Press, 2022, doi: 10.1109/ISSCC42614.2022.9731694., articleTitle=184 QPS/W 64 Mb/mm2 3D logic-to-DRAM hybrid bonding with process-near-memory engine for recommendation system, refAbstract=null), Reference(id=1241718753960980938, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=null, pageEnd=null, url=https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/tools/ic-package-design-analysis/imaps-dev-pack-20-eda-perspective.pdf, language=null, rfNumber=[62], rfOrder=61, authorNames=Park J, journalName=null, refType=null, unstructuredReference=Park J. This is not your fathers advanced semiconductor packaging…An EDA perspective[R/OL]. [2022-07-23]. https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/tools/ic-package-design-analysis/imaps-dev-pack-20-eda-perspective.pdf., articleTitle=This is not your fathers advanced semiconductor packaging…An EDA perspective, refAbstract=null), Reference(id=1241718754015506891, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=2008, volume=null, issue=null, pageStart=538, pageEnd=543, url=null, language=null, rfNumber=[63], rfOrder=62, authorNames=Knickerbocker J U, Andry P S, Dang B, journalName=2008 58th Electronic Components and Technology Conference, refType=null, unstructuredReference=Knickerbocker J U, Andry P S, Dang B, et al. 3D silicon integration[C]// 2008 58th Electronic Components and Technology Conference. Piscataway: IEEE Press, 2008: 538-543., articleTitle=3D silicon integration, refAbstract=null), Reference(id=1241718754074227148, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=10.1147/JRD.2008.5388564, pmid=null, pmcid=null, year=2008, volume=52, issue=6, pageStart=553, pageEnd=569, url=http://ieeexplore.ieee.org/document/5388564/, language=null, rfNumber=[64], rfOrder=63, authorNames=Knickerbocker J U, Andry P S, Dang B, journalName=IBM Journal of Research and Development, refType=null, unstructuredReference=Knickerbocker J U, Andry P S, Dang B, et al. Three-dimensional silicon integration[J]. IBM Journal of Research and Development, 2008, 52(6): 553-569., articleTitle=Three-dimensional silicon integration, refAbstract=null), Reference(id=1241718754158113229, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, doi=null, pmid=null, pmcid=null, year=null, volume=null, issue=null, pageStart=1456, pageEnd=1461, url=null, language=null, rfNumber=[65], rfOrder=64, authorNames=Thonnart Y, Bernabé S, Charbonnier J, journalName=null, refType=null, unstructuredReference=Thonnart Y, Bernabé S, Charbonnier J, et al. POPSTAR: A robust modular optical NoC architecture for chiplet-based 3D integrated systems[C]// 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE). 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(来源:https://www.antaios.fr
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ν为电阻变化百分比。

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V为操作电压;Vg为WL栅压。

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工艺类型 芯片与芯片 芯片与晶圆 晶圆与晶圆
示意图
优势 工艺灵活,采用合格芯粒,良率高 易于集成混合键合工艺;
工艺灵活,采用合格芯粒,良率高
成本低;
生产效率高
劣势 不利于规模化生产;
不易加工和键合;
静电阻抗器要求高
静电阻抗器要求高;
不易加工和键合
混合键合工艺集成困难;
良率不易保障
), ArticleFig(id=1241718748168647052, tenantId=1146029695717560320, journalId=1146032081894723586, articleId=1241718661887611596, language=CN, label=表1, caption=

堆叠技术分类

, figureFileSmall=null, figureFileBig=null, tableContent=
工艺类型 芯片与芯片 芯片与晶圆 晶圆与晶圆
示意图
优势 工艺灵活,采用合格芯粒,良率高 易于集成混合键合工艺;
工艺灵活,采用合格芯粒,良率高
成本低;
生产效率高
劣势 不利于规模化生产;
不易加工和键合;
静电阻抗器要求高
静电阻抗器要求高;
不易加工和键合
混合键合工艺集成困难;
良率不易保障
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Development of Integrated Circuit Industrial Technologies in the Post-Moore Era
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Weihai BU 1, , Zhiliang XIA 2 , Zhiguo ZHAO 1 , Yun LIU 1 , Yikang ZHOU 1
Science and Technology Foresight | Review and Commentary 2022,1(3): 20-41
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Science and Technology Foresight | Review and Commentary 2022, 1(3): 20-41
Development of Integrated Circuit Industrial Technologies in the Post-Moore Era
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Weihai BU1, , Zhiliang XIA2, Zhiguo ZHAO1, Yun LIU1, Yikang ZHOU1
Authors
  • 1. Semiconductor Technology Innovation Center (Beijing) Corp., Beijing 100176, China
  • 2. Yangtze Memory Technologies Co., Ltd., Wuhan 430000, China

Corresponding author:

Development of Integrated Circuit Industrial Technologies in the Post-Moore Era
Weihai BU1, , Zhiliang XIA2, Zhiguo ZHAO1, Yun LIU1, Yikang ZHOU1
Affiliations
  • 1. Semiconductor Technology Innovation Center (Beijing) Corp., Beijing 100176, China
  • 2. Yangtze Memory Technologies Co., Ltd., Wuhan 430000, China
Published: 2022-09-20 doi: 10.3981/j.issn.2097-0781.2022.03.002
Outline
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Logic and memory technologies of integrated circuits (ICs) cannot be updated simply by plane scaling in the post-Moore era, and three dimensions (or 3D) have become a promising development direction. This paper discussed the development of technologies that have attracted wide attention from industries in the post-Moore era and are highly compatible with the existing IC industrial technologies and ecology in terms of logic, memory, and 3D integration. Furthermore, the paper analyzed the advantages and challenges of various technologies and tried to give suggestions on China’s research and development in this regard. In addition, in terms of logic technology, the paper started from the device development to expound on the current mainstream FinFET in mass production and gate-all-around nanodevices to be mass-produced and then introduced Forksheet and CFET devices. In terms of memory technology, the paper analyzed several memory devices, which include six different memorizers that are or are to be mass-produced. Finally, in terms of 3D integration, the paper described three popular technologies including 3D stacking, Chiplet, and large chips.

post-Moore era  /  integrated circuit  /  advanced logic  /  advanced memory  /  3D integration

Logic and memory technologies of integrated circuits (ICs) cannot be updated simply by plane scaling in the post-Moore era, and three dimensions (or 3D) have become a promising development direction. This paper discussed the development of technologies that have attracted wide attention from industries in the post-Moore era and are highly compatible with the existing IC industrial technologies and ecology in terms of logic, memory, and 3D integration. Furthermore, the paper analyzed the advantages and challenges of various technologies and tried to give suggestions on China’s research and development in this regard. In addition, in terms of logic technology, the paper started from the device development to expound on the current mainstream FinFET in mass production and gate-all-around nanodevices to be mass-produced and then introduced Forksheet and CFET devices. In terms of memory technology, the paper analyzed several memory devices, which include six different memorizers that are or are to be mass-produced. Finally, in terms of 3D integration, the paper described three popular technologies including 3D stacking, Chiplet, and large chips.

post-Moore era  /  integrated circuit  /  advanced logic  /  advanced memory  /  3D integration
卜伟海, 夏志良, 赵治国, 刘芸, 周亦康. 后摩尔时代集成电路产业技术的发展趋势[J]. 前瞻科技, 2022 , 1 (3) : 10 -148 . DOI: 10.3981/j.issn.2097-0781.2022.03.002
Weihai BU, Zhiliang XIA, Zhiguo ZHAO, Yun LIU, Yikang ZHOU. Development of Integrated Circuit Industrial Technologies in the Post-Moore Era[J]. Science and Technology Foresight, 2022 , 1 (3) : 10 -148 . DOI: 10.3981/j.issn.2097-0781.2022.03.002
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doi: 10.3981/j.issn.2097-0781.2022.03.002
  • Received:2022-07-31
  • Published:2022-09-20
  • Release:2022-11-04
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  • 收稿日期:2022-07-31
  • 修回日期:2022-09-01
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    1. Semiconductor Technology Innovation Center (Beijing) Corp., Beijing 100176, China
    2. Yangtze Memory Technologies Co., Ltd., Wuhan 430000, China

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卜伟海, 夏志良, 赵治国, 刘芸, 周亦康. 后摩尔时代集成电路产业技术的发展趋势[J]. 前瞻科技, 2022 , 1 (3) : 10 -148 . DOI: 10.3981/j.issn.2097-0781.2022.03.002
Weihai BU, Zhiliang XIA, Zhiguo ZHAO, Yun LIU, Yikang ZHOU. Development of Integrated Circuit Industrial Technologies in the Post-Moore Era[J]. Science and Technology Foresight, 2022 , 1 (3) : 10 -148 . DOI: 10.3981/j.issn.2097-0781.2022.03.002
表12种不同金属材料的力学参数

Family
属数
Number of
genus
种数
Number of
species
占总种数比例
Percentage of
total species (%)

Genus
种数
Number of
species
占总种数比例
Percentage of total
species (%)
鹅膏菌科Amanitaceae 2 11 5.26 鹅膏菌属 Amanita 10 4.78
小菇科 Mycenaceae 2 12 5.74 丝盖伞属 Inocybe 5 2.39
多孔菌科 Polyporaceae 8 14 6.70 蜡蘑属 Laccaria 5 2.39
红菇科 Russulaceae 3 23 11.00 小皮伞属 Marasmius 6 2.87
小菇属 Mycena 11 5.26
光柄菇属 Pluteus 5 2.39
红菇属 Russula 17 8.13
栓菌属 Trametes 5 2.39
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