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Article(id=1243220380001878022, tenantId=1146029695717560320, journalId=1242844143416819734, issueId=1243220377556595432, articleNumber=null, orderNo=null, doi=10.15959/j.cnki.0254-0053.2025.03.002, pmid=null, cstr=null, oa=null, hot=null, price=null, onlineType=0, articleFormat=0, articleType=null, articleTypeStr=null, receivedDate=1745424000000, receivedDateStr=2025-04-24, revisedDate=null, revisedDateStr=null, acceptedDate=null, acceptedDateStr=null, onlineDate=1774336436510, onlineDateStr=2026-03-24, pubDate=1758729600000, pubDateStr=2025-09-25, doiRegisterDate=null, doiRegisterDateStr=null, onlineIssueDate=1774336436510, onlineIssueDateStr=2026-03-24, onlineJustAcceptDate=null, onlineJustAcceptDateStr=null, onlineFirstDate=null, onlineFirstDateStr=null, sourceXml=null, magXml=null, createTime=1774336436509, creator=13701087609, updateTime=1774336436509, updator=13701087609, issue=Issue{id=1243220377556595432, tenantId=1146029695717560320, journalId=1242844143416819734, year='2025', volume='46', issue='3', pageStart='541', pageEnd='810', issueExtLink='null', onlineDate='null', pubDate='null', beforeIssueId=null, nextIssueId=null, price=null, status=1, issueComplete=1, articleOrder=1, issueType=-1, specialIssue=null, createTime=1774336435926, creator=13701087609, updateTime=1774336648182, updator=13701087609, preIssue=null, nextIssue=null, ext={EN=IssueExt(id=1243221267898282005, tenantId=1146029695717560320, journalId=1242844143416819734, issueId=1243220377556595432, language=EN, specialIssueTitle=, coverIllustrator=null, specialIssueEditor=, specialIssueAbout=), CN=IssueExt(id=1243221267898282006, tenantId=1146029695717560320, journalId=1242844143416819734, issueId=1243220377556595432, language=CN, specialIssueTitle=, coverIllustrator=null, specialIssueEditor=, specialIssueAbout=)}, issueFiles=null}, startPage=570, endPage=585, ext={EN=ArticleExt(id=1243220380228370442, articleId=1243220380001878022, tenantId=1146029695717560320, journalId=1242844143416819734, language=EN, title=Mechanical Analysis and Comparative Study of Ultra-Thin Chip Stretching-Ejecting Peeling Process, columnId=null, journalTitle=Chinese Quarterly of Mechanics, columnName=null, runingTitle=null, highlight=null, articleAbstract=

As a critical step in flexible electronics packaging, the ultra-thin chip peeling process plays a vital role in ensuring high-yield manufacturing. This study focused on mechanical behavior differences between two peeling methods: roller-stretching and needle-ejecting. A theoretical model of the "chip-adhesive-substrate" laminated structure was established and validated by finite element simulation. A dual-criteria safety criterion was proposed to quantify process safety based on the competing relationship between interfacial fracture energy of the adhesive layer and surface cracking stress of the chip layer, which overcame the limitations of traditional methods for quantitatively evaluating the safety of the peeling process. Results demonstrated that the needle-ejecting procedure outperforms roller-stretching in terms of the safety of ultra-thin chip peeling. The roller-stretching process only has high engineering application prospect for peeling large-sized and thick chips from soft and thick substrates. Furthermore, an innovative stretching-ejecting combination technology is proposed, introducing the concept of synergistic matching to achieve chip stress neutralization and fracture mode optimization. This research provides theoretical insights into non-destructive ultra-thin chip peeling technology, and delivers practical guidance for advancing high-yield flexible microelectronics packaging.

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超薄芯片剥离工艺作为柔性电子封装流程的核心步骤，是高良率生产的技术保障．本文针对滚轮卷拉与排针顶推两种剥离工艺，建立“芯片-胶层-衬底”叠层结构的理论模型，结合有限元仿真揭示其力学行为差异．通过提出基于胶层界面断裂能与芯片表面损伤应力竞争关系的双判据安全准则，克服剥离工艺安全性量化评估方法的局限．研究表明：顶推工艺在超薄芯片剥离安全性上显著优于卷拉工艺，卷拉工艺仅针对软质厚衬底上剥离大尺寸厚芯片具有较高的工程应用价值．创新性提出了卷拉-顶推组合技术，引入实现芯片应力中和与断裂模式优化的协同匹配思路．研究为无损超薄芯片剥离技术的开发提供了理论支持，对推动微电子高良率封装技术进步具有指导意义．

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陈思宇，博士，助理教授．研究方向：柔性芯片制造关键技术．E-mail：；
吕文瀚，讲师．研究方向：柔性超声换能器设计及制备．E-mail：
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史柯文，硕士生．研究方向：柔性超薄芯片的剥离工艺优化．E-mail：

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史柯文，硕士生．研究方向：柔性超薄芯片的剥离工艺优化．E-mail：

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史柯文，硕士生．研究方向：柔性超薄芯片的剥离工艺优化．E-mail：

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Geometric and material parameters of the finite element model

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LayerElastic modulus/MPaPoisson's ratioLength/mmThickness/μm
Chip129 0000.281025
Adhesive400.41~105
Substrate1600.4515100
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有限元仿真模型几何尺寸与材料参数

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LayerElastic modulus/MPaPoisson's ratioLength/mmThickness/μm
Chip129 0000.281025
Adhesive400.41~105
Substrate1600.4515100
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超薄芯片卷拉-顶推剥离力学分析与对比研究
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史柯文 1 , 孔子文 1 , 吕文瀚 2 , 陈思宇 1, 3
力学季刊 | 2025,46(3): 570-585
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力学季刊 | 2025, 46(3): 570-585
超薄芯片卷拉-顶推剥离力学分析与对比研究
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史柯文1 , 孔子文1, 吕文瀚2 , 陈思宇1, 3
作者信息
  • 1.同济大学　航空航天与力学学院，上海　200092
  • 2.北京建筑大学　机电与车辆工程学院，北京　100044
  • 3.上海飞行器力学与控制研究院，上海　200092

    • 史柯文，硕士生．研究方向：柔性超薄芯片的剥离工艺优化．E-mail：

通讯作者:

陈思宇，博士，助理教授．研究方向：柔性芯片制造关键技术．E-mail：；
吕文瀚，讲师．研究方向：柔性超声换能器设计及制备．E-mail：
Mechanical Analysis and Comparative Study of Ultra-Thin Chip Stretching-Ejecting Peeling Process
Kewen SHI1 , Ziwen KONG1, Wenhan LYU2 , Siyu CHEN1, 3
Affiliations
  • 1.School of Aerospace Engineering and Applied Mechanics, Tongji University, Shanghai 200092, China
  • 2.School of Mechanical-Electronic and Vehicle Engineering, Beijing University of Civil Engineering and Architecture, Beijing 100044, China
  • 3.Shanghai Institute of Aircraft Mechanics and Control, Shanghai 200092, China
出版时间: 2025-09-25 doi: 10.15959/j.cnki.0254-0053.2025.03.002
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摘要
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超薄芯片剥离工艺作为柔性电子封装流程的核心步骤，是高良率生产的技术保障．本文针对滚轮卷拉与排针顶推两种剥离工艺，建立“芯片-胶层-衬底”叠层结构的理论模型，结合有限元仿真揭示其力学行为差异．通过提出基于胶层界面断裂能与芯片表面损伤应力竞争关系的双判据安全准则，克服剥离工艺安全性量化评估方法的局限．研究表明：顶推工艺在超薄芯片剥离安全性上显著优于卷拉工艺，卷拉工艺仅针对软质厚衬底上剥离大尺寸厚芯片具有较高的工程应用价值．创新性提出了卷拉-顶推组合技术，引入实现芯片应力中和与断裂模式优化的协同匹配思路．研究为无损超薄芯片剥离技术的开发提供了理论支持，对推动微电子高良率封装技术进步具有指导意义．

芯片剥离工艺  /  滚轮卷拉  /  排针顶推  /  竞争断裂关系  /  剥离安全准则

As a critical step in flexible electronics packaging, the ultra-thin chip peeling process plays a vital role in ensuring high-yield manufacturing. This study focused on mechanical behavior differences between two peeling methods: roller-stretching and needle-ejecting. A theoretical model of the "chip-adhesive-substrate" laminated structure was established and validated by finite element simulation. A dual-criteria safety criterion was proposed to quantify process safety based on the competing relationship between interfacial fracture energy of the adhesive layer and surface cracking stress of the chip layer, which overcame the limitations of traditional methods for quantitatively evaluating the safety of the peeling process. Results demonstrated that the needle-ejecting procedure outperforms roller-stretching in terms of the safety of ultra-thin chip peeling. The roller-stretching process only has high engineering application prospect for peeling large-sized and thick chips from soft and thick substrates. Furthermore, an innovative stretching-ejecting combination technology is proposed, introducing the concept of synergistic matching to achieve chip stress neutralization and fracture mode optimization. This research provides theoretical insights into non-destructive ultra-thin chip peeling technology, and delivers practical guidance for advancing high-yield flexible microelectronics packaging.

chip peeling process  /  roller-stretching  /  needle-ejecting  /  competing fracture  /  peeling safety criterion
史柯文, 孔子文, 吕文瀚, 陈思宇. 超薄芯片卷拉-顶推剥离力学分析与对比研究. 力学季刊, 2025 , 46 (3) : 570 -585 . DOI: 10.15959/j.cnki.0254-0053.2025.03.002
Kewen SHI, Ziwen KONG, Wenhan LYU, Siyu CHEN. Mechanical Analysis and Comparative Study of Ultra-Thin Chip Stretching-Ejecting Peeling Process[J]. Chinese Quarterly of Mechanics, 2025 , 46 (3) : 570 -585 . DOI: 10.15959/j.cnki.0254-0053.2025.03.002
正文
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随着微电子及其封装技术（如图1（a））向高集成度、超薄化与柔性化方向快速发展[1]，芯片剥离工艺作为封装流程中的核心环节，其精度与可靠性对器件性能及良品率具有决定性影响[2-3]．该工艺通过机械作用将已完成电路制造的芯片从临时衬底膜上分离并转移，这一过程涉及“芯片-胶层-衬底膜”三层叠合结构的复杂力学响应[4-5]．安全高效的无损剥离技术需要在实现芯片与衬底膜间的稳定脱粘时，避免界面损伤及芯片脆性断裂等问题．然而现有工艺在工程应用中仍面临力学行为复杂、工艺参数难以量化、技术手段难以突破等挑战，这些问题严重制约了超薄芯片（厚度<25 μm）[6,7]的封装良率．因此，芯片剥离技术研究对推动广泛应用超薄芯片的现代柔性电子深度集成具有关键作用[8]．
芯片剥离技术的核心挑战在于如何平衡胶粘界面剥离效率与层内结构安全性，在力学理论上可归结为对内聚力界面断裂和脆性材料失效的竞争关系问题[9]．目前描述粘合层合结构的界面分离机制[10]存在基于经典强度理论[11-12]与断裂力学理论[9]的两种解析模型．断裂力学理论模型以能量释放率作为评估界面分层的有效准则[13-17]，克服了分析界面裂纹尖端奇异应力场带来的困难[17-18]．这种粘合结构的断裂分层行为和评估准则得到了大量仿真数据与生产实验的充分验证[19-22]．
如图1（b）所示，在临时衬膜底部排针，通过排针顶推实现芯片剥离的工艺方法，因其操作简便、无需高温或化学试剂等优势，成为工程实践中通过机械作用实现芯片-衬底膜脱粘的常用技术[2]．现有研究通过“芯片-胶层-基底”结构理论模型的数值计算[11]、界面剥离力学理论解析[9,23]及仿真与实验研究[19,21]，系统分析了芯片几何尺寸[2]、衬底膜材料[24-25]和初始裂纹状况[9]等结构因素的影响，并对顶针阵列排布[2]、多工艺混合边界条件[26-27]与工艺温度[24]等关键工艺参数进行了深入解析．针对芯片剥离的竞争行为的力学表征，Chen等[2]提出了一种耦合材料失效和界面断裂行为的无量纲剥离健康指数，评估了顶推工艺的应用效果，但未能进一步针对实际工况的断裂行为判据建立实用剥离安全准则．
柔性微电子系统中，当粘贴在无机薄膜刚性体上的柔性软胶带受拉时，模量差异导致的界面滑动[28]会显著影响产品性能和长期可靠性[29-30]．如图1（c）所示，可以通过低角度拉伸弹性体的机械剥离手段实现胶粘结构界面剪切脱粘．目前这种技术方法在晶圆级封装工艺中的实用效益尚未明确，与顶推剥离方法的工程效益对比缺乏具体安全指标．因此将软基底的滚轮拉伸技术与传统机械剥离工艺相结合，有望推动芯片剥离的工艺完善和技术进步．
本研究对滚轮卷拉和排针顶推两种技术进行芯片剥离工艺的工程效益对比．建立“芯片-胶层-衬底”叠层结构模型，采用解析解与准静态有限元仿真的交叉验证来确保模型准确性．提出基于胶层界面断裂与芯片表面损伤双判据的竞争断裂行为理论，构建剥离损伤指标并确立芯片剥离工艺的安全准则．研究揭示了两种技术在芯片应力分布、胶层断裂模式及工艺损伤指标等方面的差异，并提出通过卷拉-顶推组合荷载模式实现界面断裂能优化与芯片损伤抑制的工艺优化策略．通过材料参数与几何尺寸进行工程实用测试，探索了不同工况下的剥离技术适用性．本研究为芯片剥离的力学机制进行了理论解释，推动了高良率、低损伤芯片剥离技术发展，为先进柔性电子封装技术的开发和产业化应用提供了科学依据．
1　芯片粘接叠层结构建模与仿真
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1.1　粘接叠层结构解析建模
针对“硅基芯片-胶层-衬底膜”三层复合结构在滚轮卷拉工艺作用下的力学响应，本研究基于弹性力学和断裂力学等理论建立了两种工艺荷载下的粘接叠层模型（如图2（a）~（b））进行芯片剥离行为分析[31]．该模型采用以下理论假设和简化条件：（1）根据荷载与变形情况，将三维剥离行为问题简化为二维平面应变模型问题．（2）根据圣维南原理，将滚轮卷拉荷载简化为衬底膜两端的集中力作用．（3）根据结构几何与荷载的平面对称性，仅对右半部分结构进行建模分析．模型定义了芯片层、胶层和衬底层的几何尺寸（厚度hc，ha，hs与长度lc，la，ls）以及材料性质（弹性模量Ec，Ea，Es和泊松比vc，va，vs）共12个特征参数．
基于Timoshenko梁理论，根据胶层裂纹长度将结构划分为两个区域，并建立芯片层和衬底层的局部坐标系，其中i=c（芯片），s（衬底），表示分层标识；j=Ⅰ，Ⅱ表示分区标识．划分后的结构模型由粘接层合梁（Ⅰ）和外伸单梁（Ⅱ）两个部分拼接而成．通过定义各层梁中性面轴向位移、横向位移及横截面转角等基本量，根据运动学关系[32]建立芯片和基底层的位移场表达式
进而根据几何关系得到单层梁的应变场
对于线弹性材料的叠层梁，依据胡克定律可分别得出单层梁的应力场表达式，，其中Ei和Gi=Ei/2（1+vi）分别为材料弹性与剪切模量．对于平面应变模型，需要作Ei*=Ei/（1- νi2）的有效模量替换．通过对各层梁横截面积分，得到梁微元段的轴力、剪力和弯矩表达式
式中，Ai=Ei*hi，Ci=（5/6）Gihi，分别为拉伸、剪切和弯曲等效模量[33]．
假设薄胶层应力均匀分布，将胶接层等效为线弹性弹簧[23,31]，通过层合梁部分上下层的变形协调关系与胡克定律得到胶层内应变场和应力场如下
式中，，分别为胶层弹性与剪切刚度．
根据牛顿运动定律，对准静态条件下芯片和衬底两层内力与层间应力传递关系作平衡分析（如图3）．通过建立轴力平衡、剪力平衡和力矩平衡方程，忽略高阶非线性项[34]即可得粘接叠合梁的平衡微分关系
将平衡微分方程（5）代入各层弹性方程（3），并根据层间本构关系（4）消去位移项，可得到胶层正、切应力的高阶微分方程
式中
式中，ac=1/Ac，as=1/As，cc=1/Cc，cs=1/Cs，dc=1/Dc，ds=1/Ds．
对胶层正、切应力表达式进行求导解耦，即可得到仅含胶层正应力的高阶微分方程
以及用正应力表示的胶层切应力关系式
式中
对于高阶常系数线性微分方程（7），采用特征根法可求解胶层正应力的解析表达式，并根据正、切应力关系积分得到胶层切应力表达式，因此可得胶层应力场解析如下
式中，λ1，λ2，…，λ6为特征方程的根，ζ1，ζ2，…，ζ7为待定积分常数．将胶层应力表达式代入弹性方程，可进一步解析粘接结构各层梁的内力与位移场
对于外伸单梁区域的两个线弹性梁层，芯片单梁视为外伸自由梁，其内力与位移关系存在与连接端部内力与位移相关的简单表达式；衬底单梁视为外伸固支梁，其平衡微分关系为
联立弹性方程（3），通过位移法解析表达衬底单梁位移场
将位移场代回弹性方程式（3）即可得到衬底单梁内力场
式（10）、式（12）和式（13）即构成整个芯片粘接叠层结构各层内力和位移场的解析解．通过已知荷载结合边界和连续性条件（见附录A）求解26个待定积分常数．值得注意的是，所有边界与连续性方程构成的矩阵不足以唯一确定所有待定积分常数，需要结合积分解析式恒等条件确定（见附录B）．此时可等阶构成关于待定积分常数ζ1，ζ2，…，ζ26的矩阵关系式
式中，EBC，FID分别为边界与连续性条件和积分解析式恒等条件构成的26阶线性无关系数矩阵，G为非零列向量．通过矩阵算法可得到所有待定积分常数的代数表达式
1.2　芯片剥离工艺安全准则
基于上述理论模型，可通过MATLAB实现实际工艺参数的解析计算．针对芯片剥离过程的实际工程行为分析，需重点研究双行为判据竞争机制的综合影响．通过关键参数耦合分析，可揭示胶层界面断裂与芯片表面损伤的竞争断裂行为[2]（如图4（a））．基于材料强度理论，若芯片结构最大拉伸应力σt_max超过材料极限应力[σ]，则判定为芯片脆性断裂（如图4（b））．通过平面应变梁模型的内力关系推导，可获得横截面上的正应力极值，进而确定芯片整体结构的最大拉伸应力．依据Griffith准则，胶层界面的能量释放率Gpeel与胶层临界断裂能Gc的相对关系可作为层间裂纹扩展行为的判据[15]（如图4（c））．平面应变模型的断裂行为表现为张开型断裂和滑移型断裂的复合模式，对于线弹性模型，胶层界面端部的能量释放率可视为两种模式断裂能的线性叠加．因此基于量纲分析定义工艺荷载下的剥离损伤指标
式中
在工艺效益的对比分析中，由于损伤指数ΓPDI的无量纲性，其数值变化与工艺荷载下的幅值无关，且不受材料断裂阈值影响，因此可直接作为评估剥离工艺效益的固有属性．ΓPDI值越低，表明剥离荷载产生的芯片拉伸应力与胶层开裂能量释放率比值越低，生产过程中的安全性较高，当ΓPDI趋向0时，荷载作用全部转化为胶层界面能，此时视为完全无损剥离状态．结合工程实用的材料拉伸应力极限[σc]和胶层临界断裂能（Ga）c这两个对于关键行为的力学判据，定义临界剥离损伤指标[Γ]为
由此确定芯片剥离工艺的双判据安全准则：当某种剥离技术满足ΓPDI≤[Γ]，说明当这种工艺加载使得胶层达到临界断裂能（Ga）c时，芯片拉伸强度不致达到应力极限[σc]，则认为该工艺可实现准静态下的安全芯片剥离，ΓPDI值越低的剥离技术安全性越高．需说明的是，本安全准则仅适用于静力学剥离工况，实际生产中为提高生产效率常采用高速加载，因此在满足静力学安全剥离准则的工艺中，宜优先选用ΓPDI更低的实用技术来确保动态工况下的可靠性．
1.3　准静态有限元仿真设计
为确保理论模型的准确性，通过Abaqus 6.14进行芯片剥离过程的有限元仿真数据验证．如图5（a）、图6（a）所示，仿真模型为包含芯片-胶层-衬底的三层对称半模型，具体几何尺寸与材料参数如表1所示．通过设置10组不同胶层裂纹长度（0~0.9lc）的准静态加载工况，开展多参数的响应分析．在界面建模中采用“Tie”约束模拟层间粘合关系；在网格划分中使用四节点双线性平面应变四边形（CPE4）单元，并优化各层单元尺寸以确保网格密度满足收敛性．在边界与荷载关系设定上，对称界面处设置内力与位移分量的对称约束，在卷拉工艺中，对拉伸端部控制横向变形和转动，并施加轴向均布拉力；在顶推工艺中，对端部设置固支条件，并在排针位置施加集中推力．控制分析步长以保证准静态加载状态，提取芯片表面正应力场和胶层尖端应力场数据，重点通过以下指标验证计算准确性：（1）特定胶层裂纹长度下芯片表面正应力场分布；（2）胶层开裂全过程的尖端应力场演化．图5（b）~（d）、图6（b）~（d）对比结果表明，理论模型与仿真数据在关键指标上高度吻合，能够准确预测实际工艺的力学响应，这为后续工艺参数的优化提供了可靠的理论依据，同时证实了准静态模型解析持续剥离过程的合理性．
2　卷拉-顶推效益对比
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针对卷拉剥离和顶推剥离两种工艺方式的力学性能对比，包含映射到实际生产中的工程安全性、效益性问题，不仅需要对不同工艺的损伤指标进行数据分析，还需要重点探究荷载作用下的芯片应力场分布、胶层能量释放模式，以及基于结构与材料实用参数考虑的工艺方案适应性等方面．工艺对比所用层合结构的尺寸与材料特性参数与表1一致．
2.1　芯片表面应力场分布
根据芯片表面拉伸脆断判据，芯片表面最大拉伸应力σt_max是剥离拾取过程中机械损伤行为的主要来源，因此剥离工艺下的芯片上下表面的正应力场分布，尤其是受拉表面的应力状态，是评估芯片安全状态的重要指标．通过量纲分析，定义与荷载强度无关的表征拉伸应力，其中m=stretch或eject表示剥离荷载，分析了两种工艺下芯片受拉表面应力场在裂纹扩展全过程中的分布特征（如图7（a）~（b））．结果表明，两种工艺荷载下的芯片表面应力均呈现平稳分布，且在接近胶层尖端处应力骤降．因此芯片剥离过程的表面最大拉伸应力可近似用受拉表面中心位置的应力值表征．结合图5、图6所示的芯片上下表面应力分布对比，卷拉和顶推荷载作用下的应力场呈现反对称关系：卷拉荷载作用时，芯片上表面受压、下表面受拉；顶推荷载作用时，芯片上表面受拉、下表面受压，这种应力分布差异导致两种工艺的潜在损伤位置不同，从而对芯片的后续生产与应用产生不同影响：（1）卷拉工艺可能造成的损伤集中在芯片背面的硅晶片基板侧．这种背面损伤在常规电路检测中可能无法即时发现，若受损芯片被用于柔性电子封装，可能严重影响产品使用寿命和良品率．（2）顶推工艺可能造成的损伤位于芯片上表面的集成电路功能区．虽然表面损伤可能直接导致电路失效，但在后续检测流程中易于识别，可及时剔除残次品从而避免进一步制造浪费．综合来看，从芯片损伤对后续工艺的影响角度分析，顶推工艺更有利于保障生产线的技术流畅性和生产良品性，从而提高整体工程效率．
针对芯片表面中心应力危险点，通过分析两种工艺作用下的表征表面最大拉伸应力随裂纹扩展的变化趋势（如图8）可得，恒力卷拉作用的芯片表面最大拉伸应力随裂纹扩展呈递增趋势，并在临近完全分层时达到峰值后略有下降；恒力顶推作用的芯片表面最大拉伸应力随裂纹扩展持续递减．这表明在准静态加载剥离过程中，若恒力工艺加载值可以使得胶层裂纹完全扩展，则卷拉工艺在胶层裂纹临近完全扩展时达到风险最高阶段，而顶推工艺的风险最高阶段出现在胶层裂纹初始扩展时期．这种工艺风险阶段的差异性为技术优化提供了不同的改进路径，卷拉剥离技术可以相对安全地实现芯片的初步脱粘（即胶层未完全开裂的不充分分层状态），并通过精准控制裂纹扩展至风险阶段时中止，结合真空拾取等辅助工艺完成最终剥离．而顶推剥离技术在分层初始阶段即面临较大技术风险，可能直接造成芯片的剥离损伤．
2.2　胶层尖端断裂能量模式
基于层间裂纹扩展判据，芯片-衬底的分层过程可表征为胶层微裂纹尖端应力场引发的内聚力破坏，其本质是张开型断裂（正应力主导）和滑移型断裂（切应力主导）的线性叠加．通过量纲分析定义与荷载强度无关的表征断裂能，对比两种工艺下胶层尖端断裂能随裂纹扩展的演化规律（如图9（a）~（b））．结果表明，两种工艺荷载具有胶层尖端断裂能随着裂纹扩展呈现递减趋势的共性规律，说明剥离加载可实现裂纹稳定扩展，且可通过荷载调控实现裂纹长度控制．两种工艺的断裂能构成模式不同，卷拉工艺下的断裂能完全由滑移型分量GII构成，表明其分层行为是纯剪切型断裂[35]，可以实现零角度小挠度的分层行为[29-30]．顶推工艺下的断裂能中滑移型分量GII占比随裂纹扩展持续降低，而张开型分量GI占比逐渐升高，呈现混合型断裂模式．结合图5、图6可得卷拉荷载下裂纹尖端形成压应力场，可能诱发胶层硬化效应，从而阻碍裂纹稳定扩展；分层界面在剥离过程中存在局部闭合倾向，易导致二次粘连．而顶推荷载引起的混合型断裂行为产生裂纹尖端的拉应力场，使得分层界面呈现张开趋势从而避免二次粘连，且随裂纹扩展增强的GI分量有利于实现稳定可控的分层．因此从断裂模式角度分析，顶推工艺因混合型断裂特性，即界面张开效应，展现出更优的剥离可控性与工艺稳定性．
2.3　剥离工艺安全性能指标
如1.2所述，芯片表面最大拉伸应力和胶层尖端能量释放率是评估芯片剥离工艺安全性的核心指标，分别对应材料强度极限和断裂能临界值．安全无损的芯片剥离过程需满足以下条件：在胶层裂纹扩展全过程中，当胶层尖端能量释放率达到临界值时，芯片表面最大拉伸应力始终低于材料极限应力．基于剥离安全指标是与荷载强度无关的竞争断裂行为耦合表述，可以假设荷载使裂纹全过程处于临界扩展状态，通过剥离损伤指标判定工艺安全性．如图10所示，卷拉工艺的损伤指标随裂纹扩展递增，表明在临近完全脱粘阶段存在显著技术风险，与芯片表面最大拉伸应力曲线变化规律一致．顶推工艺的损伤指标全程平稳且显著低于卷拉工艺，验证其更高的工艺安全性．针对一种工程实例验证，进行超薄硅基晶片（[σc]=130 MPa）与狮立昂6360-80型号UV膜（（Ga）c=4 N/m）的脱粘工况考虑，卷拉工艺损伤指标超过临界指标[Γ]，表明其在此工况下不具备实际应用的可能性．
结合上述讨论，兼顾卷拉和顶推技术的安全性与力学行为优势，提出如图11所示的卷拉-顶推复合加载策略．如图10所示，复合施加Teject/Tstretch=0.1的卷拉-顶推工艺的损伤指标较单独顶推工艺更低，说明这种工艺复合可以实现安全性更高的芯片剥离技术．这种复合工艺的应用优势也可以通过芯片剥离的表面应力场复合和胶层能量模式优化来分析：复合工艺的响应情况是两种工艺响应的线性叠加，卷拉与顶推荷载形成的反对称应力场叠加实现表面应力强度中和；且卷拉与顶推荷载在胶层尖端形成的不同模式的断裂能叠加，包含Ⅰ型断裂能的抵消和Ⅱ型断裂能的叠加，构成Ⅱ型断裂主导的低角度小挠度剥离分层行为．卷拉-顶推复合荷载存在降低芯片应力场和优化断裂模式的显著优势，在后续研究中通过重点探究最优荷载比，可以建立高安全性剥离工艺的指导准则．
2.4　材料特性与几何尺寸影响
Chen等[2]的研究中表明，应用顶推工艺时选用较薄、较软的衬底材料具有更高的剥离安全性．针对卷拉工艺的工程适用性，通过分析不同衬底材料与尺寸的影响机制（如图12），发现衬底材料特性对卷拉工艺安全性具有显著调控作用，弹性模量越低，卷拉工艺的损伤指标越小，表明选用低模量软衬底可有效降低卷拉工艺风险．在衬底厚度参数研究中（如图13）发现，随着衬底厚度增加，裂纹扩展初期的损伤指标显著降低，而扩展末期的损伤指标呈现先升高后下降的非单调趋势．结合卷拉工艺在裂纹临近完全扩展阶段的高风险性，可通过其他工艺辅助完成剥离，因此趋向选用较厚的衬底，从而保障初始裂纹扩展的工艺关键阶段安全性．
针对芯片面内尺寸的适应性分析（图14）表明，芯片增大时，裂纹扩展初期的损伤指标越低，且不同长度芯片在胶层裂纹扩展末期的峰值趋近，较厚芯片的损伤指标峰值点更接近裂纹末端．同样根据卷拉工艺的主要应用阶段分析，较大尺寸的芯片比较适合应用卷拉工艺实现剥离．结合图15所示规律：芯片厚度增加可显著降低裂纹扩展全过程的损伤指标，表明大厚度芯片更适宜采用卷拉工艺．综合芯片与衬底实用工况测试可知，对于大尺寸厚芯片的剥离工艺，使用软厚衬底膜上施加卷拉荷载能够实现较高的工程适用性．
3　结论
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本研究通过构建“芯片-胶层-衬底”叠层结构的理论模型，结合有限元数值模拟验证方法，系统揭示了卷拉与顶推两种芯片剥离工艺的力学行为差异，并提出了基于竞争断裂行为的双判据安全准则，为超薄芯片的无损剥离技术提供了理论支撑与优化路径．主要结论如下
（1）力学行为与失效机制上，卷拉与顶推工艺在应力场分布和断裂能量模式上呈现显著差异．卷拉工艺使得芯片下表面受拉，胶层尖端呈现剪切型断裂，裂纹扩展后期易引发芯片损伤；顶推工艺使得芯片上表面受拉，胶层断裂为张开-剪切混合模式，裂纹扩展初期风险较高．顶推工艺的整体损伤易检测性和分层界面张开效应显著优于卷拉工艺，工程应用中的安全性更高．
（2）复合工艺的创新策略上，提出卷拉-顶推组合工艺方案，通过荷载叠加实现应力场中和与断裂模式优化，抑制芯片损伤风险同时提升分层可控性，为高安全性剥离技术提供了新思路．
（3）工程适用性规律上，低模量软质厚衬底选择可显著降低卷拉工艺风险；大尺寸厚芯片在工艺适配性上体现了卷拉剥离技术的工程实用价值．
基金
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  • 国家自然科学基金(12472165; 12102222; 12204031)
  • 清华大学柔性电子技术国家重点实验室开放基金
文献
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2025年第46卷第3期
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doi: 10.15959/j.cnki.0254-0053.2025.03.002
  • 接收时间：2025-04-24
  • 首发时间：2026-03-24
  • 出版时间：2025-09-25
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  • 收稿日期：2025-04-24
基金
国家自然科学基金(12472165; 12102222; 12204031)
清华大学柔性电子技术国家重点实验室开放基金
作者信息
    1.同济大学　航空航天与力学学院，上海　200092
    2.北京建筑大学　机电与车辆工程学院，北京　100044
    3.上海飞行器力学与控制研究院，上海　200092

通讯作者:

陈思宇，博士，助理教授．研究方向：柔性芯片制造关键技术．E-mail：；
吕文瀚，讲师．研究方向：柔性超声换能器设计及制备．E-mail：
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2种不同金属材料的力学参数
科
Family		 属数
Number of
genus		 种数
Number of
species		 占总种数比例
Percentage of
total species (%)		 属
Genus		 种数
Number of
species		 占总种数比例
Percentage of total
species (%)
鹅膏菌科Amanitaceae 2 11 5.26 鹅膏菌属 Amanita 10 4.78
小菇科 Mycenaceae 2 12 5.74 丝盖伞属 Inocybe 5 2.39
多孔菌科 Polyporaceae 8 14 6.70 蜡蘑属 Laccaria 5 2.39
红菇科 Russulaceae 3 23 11.00 小皮伞属 Marasmius 6 2.87
小菇属 Mycena 11 5.26
光柄菇属 Pluteus 5 2.39
红菇属 Russula 17 8.13
栓菌属 Trametes 5 2.39
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